- The Design and Evaluation of Interleaved Authentication for Filtering False Reports in Multipath Routing WSNs
- Energy Reduction for STT-RAM Using Early Write Termination
- Locating Compromised Sensor Nodes through Incremental Hashing Authentication
- SOFTWARE--PRACTICE AND EXPERIENCE Softw. Pract. Exper. 2006; (in press)
- Thermal Management for 3D Processors via Task Scheduling Youtao Zhang
- Proactive NBTI Mitigation for Busy Functional Units in Out-of-Order Microprocessors
- Frequent Value Locality and Value-Centric Data Cache Design
- A Low-cost Memory Remapping Scheme for Address Bus Lan Gao Jun Yang Marek Chrobak Youtao Zhang* San Nguyen Hsien-Hsin S. Lee
- Thermal-Aware Task Scheduling for 3D Multicore Processors
- Proactive Recovery for BTI in High-SRAM Cells Lin Li, Youtao Zhang, Jun Yang
- Fine-Grained QoS Scheduling for PCM-based Main Memory Systems Ping Zhou Yu Du Youtao Zhang Jun Yang
- Performance-Aware Thermal Management via Task Scheduling
- A co-commitment based secure data collection scheme for tiered wireless sensor networks
- Frequent Value Compression in Packet-based NoC Architectures Ping Zhou , Bo Zhao , Yu Du , Yi Xu , Youtao Zhang , Jun Yang , Li Zhao
- Supporting Flexible Streaming Media Protection through Privacy-aware Secure
- Adaptive Buffer Management for Efficient Code Dissemination in Multi-Application Wireless Sensor Networks
- The Interleaved Authentication for Filtering False Reports in Multipath Routing based Sensor Networks
- InfoShield: A Security Architecture for Protecting Information Usage in Memory
- Architectural Support for Protecting User Privacy on Trusted Processors
- Efficient Forward Computation of Dynamic Slices Using Reduced Ordered Binary Decision Diagrams
- Fast Secure Processor for Inhibiting Software Piracy and Tampering Jun Yang Youtao Zhang* Lan Gao
- Enabling Partial Cache Line Prefetching Through Data Compression
- LightweightSet Buffer: Low Power Data Cache for MultimediaApplication
- A Durable and Energy Efficient Main Memory Using Phase Change Memory Technology
- An Efficient Code Update Scheme for DSP Applications in Mobile Embedded Systems
- Precise Dynamic Slicing Algorithms* Xiangyu Zhang RajivGupta
- Procedural Level Address Offset Assignment of DSP Applications with Loops
- Low Cost Instruction Cache Designsfor Tag Comparison Elimination
- Simple Virtual Channel Allocation for High Throughput and High Frequency On-Chip Routers
- Variation-Tolerant Non-Uniform 3D Cache Management in Die Stacked Multicore Processor
- Towards Update-Conscious Compilation for Energy-Efficient Code Dissemination in WSNs
- An authentication scheme for locating compromised sensor nodes in WSNs Youtao Zhang a,, Jun Yang b
- Improving Memory Encryption Performance in Secure Processors
- Dynamic Thermal Management through Task Scheduling Marek Chrobak
- Dynamic Authentication-Key Re-assignment for Reliable Report Delivery
- Reduce Register Files Leakage Through Discharging Cells
- SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors
- Efficient Group Key Management with Tamper-resistant ISA Extensions Youtao Zhang Jun Yang, and Lan Gao
- A Composite and Scalable Cache Coherence Protocol for Large Scale CMPs
- MRAC: A Memristor-based Reconfigurable Framework for Adaptive Cache Replacement
- Enhancing Phase Change Memory Lifetime through Fine-Grained Current Regulation and Voltage Upscaling
- Improving Write Operations in MLC Phase Change Memory Lei Jiang , Bo Zhao, Youtao Zhang Jun Yang Bruce R. Childers
