- Case Study1 : Pentium-Pro Basis for Centrinos, Core, Core 2
- Appears in the Proceedings of the 35th Annual International Symposium on Microarchitecture (MICRO-35),
- Appears in the Proceedings of the 33rd International Symposium on Computer Architecture (ISCA-33), June 2006.
- Comprehensively and Efficiently Protecting the Heap Mazen Kharbutli
- Appears in the Proceedings of the Ninth International Symposium on High Performance Computer Architecture (HPCA-9),
- Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS-and Performance-Friendly
- TLSync: Support for Multiple Fast Barriers Using On-Chip Transmission Lines
- HARE: Hardware Assisted Reverse Execution Ioannis Doudalis Milos Prvulovic
- Intro & Trends Milos Prvulovic -Fall 2007
- Appears in the Proceedings of the 30th Annual International Symposium on Computer Architecture (ISCA-30), June 2003.
- Tomasulo's Algorithm Implementing Dynamic Scheduling
- Many-core & Interconnect Milos Prvulovic
- Appears in the Proceedings of the 13th International Symposium on High-Performance Computer Architecture (HPCA-13), February 2007.
- Locality and Caches Data Locality
- Appears in the Proceedings of the 14th IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2008.
- Multiprocessors Multiprocessing
- Appears in the Proceedings of the 28th Annual International Symposium on Computer Architecture (ISCA-28),
- Appears in the Proceedings of the 2001 International Conference on Parallel Architectures (PACT 2001),
- Appears in the Proceedings of the 33rd International Conference on Software Engineering (ICSE), May 2011.
- DeFT: Design Space Exploration for On-the-Fly Detection of Coherence Misses
- Effective Memory Protection Using Dynamic Tainting James Clause, Ioannis Doudalis, Alessandro Orso, and Milos Prvulovic
- Efficient Data Protection for Distributed Shared Memory Multiprocessors
- Appears in the Proceedings of the 12th International Symposium on High-Performance Computer Architecture (HPCA-12), Febryary 2006.
- Appears in the Proceedings of the First IBM PAC2 Conference HeapMon: a Low Overhead, Automatic, and Programmable
- Appears in the Proceedings of the 29th Annual International Symposium on Computer Architecture (ISCA-29),
- CS 6290: High-Performance Computer Architecture Class Project
- Evaluation & Metrics Performance
- Instruction Level Parallelism Instruction Level Parallelism (ILP)
- Homework 1 is out! Due Tuesday next week!
- Branch Prediction Control Dependencies
- Speculation Recovery Loose Ends
- HW 2 is out! Static Exploitation of ILP
- Views of Memory Real machines have limited amounts of
- Synchronization Synchronization
- I/O and Storage Milos Prvulovic
- Appears in the 13th Workshop on Interaction between Compilers and Computer Architecture (Interact-13) held in conjunction with 15th IEEE International Symposium on High-Performance Computer Architecture, February 2009.
