- Linking Theorem Proving and ModelChecking with WellFounded Bisimulation
- The Design of a Distributed Model Checking Algorithm for Spin
- In a nutshell Symmetry and STE
- Thorough Checking Shiva Nejati Mihaela Gheorghiu Marsha Chechik
- Boundary Points and Resolution Eugene Goldberg, Panagiotis Manolios
- Integrating CCG Analysis into ACL2 Matt Kaufmann1
- Virtual Integration of Cyber-Physical Systems by Verification Panagiotis Manolios
- Combining ACL2 and an Automated Verification Tool to Verify a Multiplier
- Adding a Total Order to ACL2 Panagiotis Manolios 1 and Matt Kaufmann 2
- Ordinal Arithmetic in ACL2 Panagiotis Manolios and Daron Vroon
- A LatticeTheoretic Characterization of Safety and Panagiotis Manolios
- A Parameterized Benchmark Suite of Hard Pipelined-Machine-Verification Problems
- MuCalculus ModelChecking Panagiotis Manolios
- FMCAD Conference --November, 2006 Warren A. Hunt, Jr. UT CS and ECE
- A Compositional Theory of Refinement for Branching Time
- A Framework for Verifying Bit-Level Pipelined Machines Based on Automated Deduction and Decision Procedures
- A Robust Machine Code Proof Framework for Highly Secure Applications
- A Computationally Efficient Method Based on Commitment Refinement Maps for Verifying Pipelined Machines.
- ACL2 in DrScheme Dale Vaillancourt
- An Embedding of the ACL2 Logic in HOL Michael J.C. Gordon, Cambridge University, mjcg@cl.cam.ac.uk
- On the desirability of mechanizing calculational proofs
- Quantification in Tail-recursive Function Definitions Department of Computer Sciences
- ORGANIZATION Aarti Gupta (NEC, USA)
- A Formal Model of Lower System Layers
- ACL2s: "The ACL2 Sedan" Peter C. Dillinger Panagiotis Manolios Daron Vroon
- Implementing Survey Propagation on Graphics Processing Units
- Integrating FV Into Main-Stream Verification: The IBM Experience Jason Baumgartner
- A Suite of Hard ACL2 Theorems Arising in Refinement-Based Processor Verification
- Automatic Verification of Safety and Liveness for XScaleLike Processor Models Using WEBRefinements
- SAT-solving Based on Boundary Point Elimination
- --FMCAD, San Jose 2006 --Networks of Elastic Circuits
- Enhanced Probabilistic Verification with 3Spin and Peter C. Dillinger and Panagiotis Manolios
- Correctness of Pipelined Machines ? Panagiotis Manolios
- A Parameterized Benchmark Suite of Hard PipelinedMachineVerification Problems #
- Advanced Unbounded CTL Model Checking Based on AIGs, BDD Sweeping, And Quantifier
- Integrating Reasoning about Ordinal Arithmetic into Panagiotis Manolios and Daron Vroon
- Double Rewriting for Equivalential Reasoning in ACL2 Matt Kaufmann
- A SAT-Based Procedure for Verifying Finite State Machines Warren A. Hunt, Jr.
- JFP 18 (1): 1546, 2008. c 2007 Cambridge University Press doi:10.1017/S0956796807006338 First published online 23 April 2007 Printed in the United Kingdom
- Using Positive Tainting and Syntax-Aware Evaluation to Counter SQL Injection Attacks
- Panagiotis Manolios Mechanical Verification of Reactive Systems
- The ACL2 Sedan Theorem Proving System Harsh Raju Chamarthi, Peter Dillinger, Panagiotis Manolios, and Daron Vroon
- Generating High-Quality Tests for Boolean Circuits by Treating Tests as Proof Encodings
- Verifying Pipelines with BAT Panagiotis Manolios and Sudarshan K. Srinivasan
- Fast, All-Purpose State Storage Peter C. Dillinger and Panagiotis (Pete) Manolios
- All-Termination(T ) Panagiotis Manolios and Aaron Turon
- A posteriori soundness for non-deterministic abstract interpretations
- Automatic Verification of Safety and Liveness for Pipelined Machines
- IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 16, NO. 4, APRIL 2008 353 A Refinement-Based Compositional Reasoning
- WASP: Protecting Web Applications Using Positive Tainting and Syntax-Aware Evaluation
- BAT: The Bit-Level Analysis Tool Panagiotis Manolios1, Sudarshan K. Srinivasan2, and Daron Vroon1
- Refinement and Theorem Proving Panagiotis Manolios
- Monolithic Verification of Deep Pipelines with Collapsed Flushing Roma Kane and Panagiotis Manolios
- A Complete Compositional Reasoning Framework for the Efficient Verification of Pipelined Machines
- The Challenge of Hardware-Software Co-Verification Panagiotis Manolios
- Ordinal Arithmetic: Algorithms and Mechanization Panagiotis Manolios (manolios@cc.gatech.edu)
- Bloom Filters in Probabilistic Verification Peter C. Dillinger and Panagiotis Manolios
- Integrating Reasoning about Ordinal Arithmetic into Panagiotis Manolios and Daron Vroon
- Fast and Accurate Bitstate Verification for SPIN Peter C. Dillinger and Panagiotis Manolios
- Partial Functions in ACL2 Panagiotis Manolios (manolios@cc.gatech.edu)
- Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB-Refinements
- Brief Announcement: Branching Time Refinement Panagiotis Manolios
- Algorithms for Ordinal Arithmetic Panagiotis Manolios and Daron Vroon
- Ordinal Arithmetic in ACL2 Panagiotis Manolios and Daron Vroon
- Adding a Total Order to ACL2 Panagiotis Manolios1
- An ACL2 Tutorial J Strother Moore
- SMT Solvers Theory & Practice
- Verification Ongoing Work
- 2006 Carnegie Mellon University Assume-Guarantee
- An Integration of HOL and ACL2 Mike Gordon, Warren A. Hunt, Jr., Matt Kaufmann, James Reynolds
- Automatic Generation of Schedulings for Improving the Test Coverage of
- Parameterized Congruences in ACL2 David Greve
- Soundness of the Simply Typed Lambda Calculus in ACL2 sswords@cs.utexas.edu
- Towards A Formal Theory of On Chip Communications in the ACL2 Logic
- The Ideal of Verified Software This talk is intended as an introduction to this afternoon's
- ORGANIZATION Panagiotis Manolios (GeorgiaTech, USA)
- Automatic Memory Reductions for RTL Model Verification Panagiotis Manolios, Sudarshan K. Srinivasan, and Daron Vroon
- Efficient Circuit to CNF Conversion Panagiotis Manolios and Daron Vroon
- Faster SAT Solving with Better CNF Generation Benjamin Chambers Panagiotis Manolios
- Automatic Memory Reductions for RTL Model Verification
- Brief Announcement: Branching Time Refinement Panagiotis Manolios
- Automating Component-Based System Assembly Panagiotis Manolios
- Checking Pedigree Consistency with PCS Panagiotis Manolios, Marc Galceran Oms, and Sergi Oliva Valls
- ACL2s: "The ACL2 Sedan" Peter C. Dillinger, Panagiotis Manolios, Daron Vroon
- Memories: Array-like Records for ACL2 Jared Davis
- Veri cation of Pipelined Machines in ACL2 ? Panagiotis Manolios
- Integrating Static Analysis and General-Purpose Theorem Proving for Termination Analysis
- Refinement Maps for Efficient Verification of Processor Models Panagiotis Manolios
- A Compositional Theory of Re nement for Branching Time
- Ordinal Arithmetic: Algorithms and Mechanization Panagiotis Manolios (manolios@cc.gatech.edu)
- Phylogenetic Trees in ACL2 Warren A. Hunt Jr.
- A Verifying Core for a Cryptographic Language Compiler leepike@galois.com
- Synthesis of Designs from Property Specifications Amir Pnueli
- Algorithms for Ordinal Arithmetic Panagiotis Manolios and Daron Vroon
- Panagiotis Manolios Mechanical Veri cation of Reactive Systems
- Termination Analysis with Calling Context Graphs Panagiotis Manolios and Daron Vroon
- Adding Parallelism Capabilities to ACL2 David L. Rager
- Safety and Liveness in Branching Time Panagiotis Manolios
- Bloom Filters in Probabilistic Verification Peter C. Dillinger and Panagiotis Manolios
- Enumerating the Strings of a Regular Expression Panagiotis Manolios
- Enhanced Probabilistic Verification with 3Spin and Peter C. Dillinger and Panagiotis Manolios
- TRACKING MUSES STRICT INCONSISTENT COVERS
- Interactive Termination Proofs using Termination Cores
- Partial Functions in ACL2 Panagiotis Manolios (manolios@cc.gatech.edu)
- Linking Theorem Proving and ModelChecking with WellFounded Bisimulation ?
- A Suite of Hard ACL2 Theorems Arising in RefinementBased Processor Verification
- Partial Functions in ACL2 Panagiotis Manolios and J Strother Moore
- Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
- Model Checking TLA + Speci cations Yuan Yu 1 , Panagiotis Manolios 2 , and Leslie Lamport 1
- A Computationally Efficient Method Based on Commitment Refinement Maps for Verifying Pipelined Machines. #
- Reasoning about ACL2 File Input Jared Davis
- From PSL to NBA: a Modular Symbolic Encoding A. Cimatti1 M. Roveri1 S. Semprini1 S. Tonetta2
- Faster SAT Solving with Better CNF Generation Benjamin Chambers Panagiotis Manolios
- Synthesizing Cyber-Physical Architectural Models with Real-Time Constraints
- Pseudo-Boolean Solving by Incremental Translation Panagiotis Manolios
- To appear in EPTCS. Integrating Testing and Interactive Theorem Proving
