Frank, Matthew I. - Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign

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Frank, Matthew I. - Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign

Implications of I/O for Gang Scheduled Workloads Walter Lee, Matthew Frank, Victor Lee, Kenneth Mackenzie, and Larry Rudolph
How Speculation Can Save Power and Energy Matthew Frank
The Raw microprocessor consumes 122 million transistors; executes 16 different
To appear in the Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, February, 1998 Exploiting Two-Case Delivery for Fast Protected Messaging
SUDS: Primitive Mechanisms for Memory Dependence Speculation Matthew Frank, C. Andras Moritz, Benjamin Greenwald,
Reprinted from Intl Symp High Performance Computer Architecture (HPCA-14):999-999, c 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new
Copyright c 2005 IEEE. Reprinted from 38th Intl Symp Microarchitecture, Nov 2005, pp. 171-182. This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republish this
Accepted for publication in Intl Symp High Performance Comp Arch (HPCA-14):999-999, c 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new
Confidence Based Out-of-Order Renaming for Speculatively Multithreaded Processors
Scalar Queue Conversion: Dynamic Single Assignment for Concurrent Scheduling
Algorithm Analysis Techniques for Single Chip Computer Systems
Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams
System Support for Implicitly Parallel Programming Matthew I. Frank
Copyright c 2007 IEEE. Reprinted from 13th Intl Symp High-Perf Comp Arch, (HPCA-13):295-305, Feb 2007. This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republi
Adaptive Memory Synchronization (AMS): Balancing the Risks and Benefits of Inter-thread Load Speculation
Accepted for publication in Intl Symp Comp Arch (ISCA-35):999-999, c 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works
A Software Framework for Supporting General Purpose Applications on Raw Computation Fabrics
LoPC: Modeling Contention in Parallel Algorithms Matthew I. Frank Anant Agarwal
LoGPC: Modeling Network Contention in Message-Passing Programs Csaba Andras Moritz Matthew I. Frank
A Hybrid Shared Memory/Message Passing Parallel Machine Matthew I. Frank and Mary K. Vernon
Synchronizing Store Sets (SSS): Balancing the Benefits and Risks of Inter-thread Load Speculation
Efficient Execution of Declarative Programs (Area Exam Report)
Making Memoization Memory MIT-LCS-CAG
LoGPC: Modeling Network Contention in Message-Passing Programs