
- In this paper we present a methodology for testing k-ary, n-cube direct interconnection networks that
- 1. Introduction* Existing approaches for estimating delays in a com-
- An Efficient Partitioning Strategy for Pseudo-Exhaustive Testing* Rajagopalan Srinivasan, Sandeep K. Gupta and Melvin A. Breuer
- Test Generation for Ground Bounce in Internal Logic Circuitry* Yi-Shing Chang, Sandeep K. Gupta, and Melvin A. Breuer
- Validation and Test Generation for Inductance Induced Noise on VLSI Interconnects Arani Sinha, Sandeep K. Gupta and Melvin A. Breuer
- 420 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 6, NO. 3, SEPTEMBER 1998 Bounds on Pseudoexhaustive Test Lengths
- SWiTEST: A Switch Level Test Generation System for CMOS Combinational Circuits*
- Novel Test Pattern Generators for Pseudoexhaustive Testing
- Analytic Models for Crosstalk Delay and Pulse Analysis Under Non-Ideal Inputs1
- Test Generation in VLSI Circuits for Crosstalk Noise1 Weiyu Chen Sandeep K. Gupta Melvin A. Breuer
- Test Generation for Crosstalk-Induced Delay in Integrated Circuits1 Wei-Yu Chen, Sandeep K. Gupta and Melvin A. Breuer
- Switch-level Delay Test Suriyaprakash Natarajan Sandeep K. Gupta Melvin A. Breuer
- INTELLIGIBLE TESTING Melvin A. Breuer and Sandeep K. Gupta
- Validation and Test Generation for Oscillatory Noise in VLSI Interconnects Arani Sinha, Sandeep K. Gupta and Melvin A. Breuer
- IEEE TRANSACTIONS ON COMPUTER AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 19, NO. 12, DECEMBER 2000 1449 Fundamental CAD Algorithms
- Test Generation for Crosstalk-Induced Faults: Framework and Computational Results1
- Test Generation for Crosstalk-Induced Faults: Framework and Computational Results1
- Analytical Models for Crosstalk Excitation and Propagation in VLSI Circuits1
- 0-7803-7542-4/02 $17.00 2002 IEEE 365 ITC INTERNATIONAL TEST CONFERENCE Paper 13.1
- Process Variations and their Impact on Circuit Operation 1 Suriyaprakash Natarajan, Melvin A. Breuer, and Sandeep K. Gupta