- Unifying Bit-width Optimisation for Fixed-point and Floating-point Designs Altaf Abdul Gaffar1
- Automating Custom-Precision Function Evaluation for Embedded Processors
- IEEE TRANSACTIONS ON COMPUTERS 1 Optimizing Hardware Function Evaluation
- Application Recon gurable CORDIC Architectures
- IEEE TRANSACTIONS ON COMPUTERAIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 1 Accuracy Guaranteed BitWidth Optimization
- MiniBit: Bit-Width Optimization via Affine Arithmetic Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer and Wayne Luk
- PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs Oskar Mencer
- StReAm: Object-Oriented Programming of Stream Architectures using PAM-Blox Oskar Mencer, Heiko Hubert, Martin Morf, Michael J. Flynn
- FPGA compilation SAT problem
- PAM-Blox: High Performance FPGA Design for Adaptive Computing Oskar Mencer, Martin Morf, Michael J. Flynn
- Application of Reconfigurable CORDIC Architectures Oskar Mencer, Luc Semeria, Martin Morf
- Parallel, Pipelined CORDICs for Reconfigurable Computing Oskar Mencer, Martin Morf
- Parameterized Function Evaluation for FPGAs Oskar Mencer
- HARDWARE SOFTWARE TRIDESIGN OF ENCRYPTION FOR MOBILE COMMUNICATION UNITS
- Parameterized Function Evaluation for FPGAs Oskar Mencer \Lambda , Nicolas Boullis \Lambda\Lambda , Wayne Luk \Lambda\Lambda\Lambda and Henry Styles \Lambda\Lambda\Lambda
- Fast Division Algorithm with a Small Lookup Table Patrick Hung, Hossam Fahmy, Oskar Mencer, Michael J. Flynn
- CUSTARD -A Customisable Threaded FPGA Soft Processor and Tools
- MiniBit: BitWidth Optimization via Affine Arithmetic DongU Lee, Altaf Abdul Gaffar, Oskar Mencer and Wayne
- Efficient DigitSerial Rational Function Approximations and Digital Filtering Applications
- Efficient Digit-Serial Rational Function Approximations and Digital Filtering Applications
- Floating Point Unit Generation and Evaluation for FPGAs Jian Liang and Russell Tessier
- PAMBlox: High Performance FPGA Design for Adaptive Computing Oskar Mencer, Martin Morf, Michael J. Flynn
- Parallel, Pipelined CORDICs for Reconfigurable Computing Oskar Mencer, Martin Morf
- Fast Division Algorithm with a Small Lookup Table Patrick Hung, Hossam Fahmy, Oskar Mencer, Michael J. Flynn
- Custom Hardware Architectures for Posture Analysis M. P. T. Juvonen, J. G. F. Coutinho, J. L. Wang, B. L. Lo, W. Luk, O. Mencer and G. Z. Yang
- StReAm: ObjectOriented Programming of Stream Architectures using PAMBlox Oskar Mencer, Heiko H ubert, Martin Morf, Michael J. Flynn
- Dynamic Circuit Generation for Boolean Satisfiability
- Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs
- Design Space Exploration with A Stream Compiler Oskar Mencer, David J. Pearce, Lee W. Howes, Wayne Luk
- Adaptive Range Reduction for Hardware Function Evaluation Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer and Wayne Luk
- Floating Point Unit Generation and Evaluation for FPGAs Jian Liang and Russell Tessier
- IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 1 Accuracy Guaranteed Bit-Width Optimization
- ASC: A Stream Compiler for Computing with FPGAs
- Application of Reconfigurable CORDIC Architectures Oskar Mencer, Luc Semeria, Martin Morf
- Design Space Exploration with A Stream Compiler Oskar Mencer, David J. Pearce, Lee W. Howes, Wayne Luk
- IEEE TRANSACTIONS ON VLSI SYSTEMS, VOL. XX, NO. Y, MONTH 2000 1 ObjectOriented Domain Specific Compilers
- Precision of Semi-Exact Redundant Continued Fraction Arithmetic for VLSI Oskar Mencer, Martin Morf, Michael J. Flynn
- HARDWARE SOFTWARE TRI-DESIGN OF ENCRYPTION FOR MOBILE COMMUNICATION UNITS
- Floating-Point Bitwidth Analysis via Automatic Differentiation Altaf Abdul Gaffar1
