- Leakage Power Reduction of Embedded Memories on FPGAs Through Location Assignment
- ToolBlocks: An Infrastructure for the Construction of
- Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
- Metric Based Multi-Timescale Control For Reducing Power In Embedded Systems
- The Duct Tape of Computer
- Low-Overhead Core Swapping for Thermal Eren Kursun1
- Whiteboards that Compute: Goals and Challenges for System Designers
- Developer Paradigms and User Interac-tion in Sketch-Based Systems
- Nano-enhanced Architectures: Using Carbon Nanotube Interconnects in Cache Design
- Conflict-Avoidance in Multicore Caching for Data-Similar Executions
- IEEE/ACM TRANSACTIONS ON NETWORKING, VOL. 17, NO. 4, AUGUST 2009 1029 High-Bandwidth Network Memory System Through
- Guiding Architectural SRAM Models Banit Agrawal Timothy Sherwood
- Wavelet-Based Phase Classification Ted Huffmire and Tim Sherwood
- Bit-Split String-Matching Engines for Intrusion Detection and Prevention
- In Proceedings of the 4th Annual International Symposium on Code Generation and Optimization (CGO), March 2006. Profiling over Adaptive Ranges
- Whether tethered to an Ethernet cable or connected through wireless technol-
- Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines
- IP CACHING FOR TERABIT SPEED ROUTERS Bryan Talbot, Timothy Sherwood, Bill Lin
- Towards Understanding Architectural Tradeoffs in MEMS Closed-Loop Feedback Control
- Exploring the Processor and ISA Design for Wireless Sensor Network Applications
- Balancing Design Options with Sherpa Timothy Sherwood Mark Oskin
- Improving the Performance and Power Efficiency of Shared Helpers in CMPs
- Whiteboards that Compute: A Workload Analysis
- Extensible Control Architectures Greg Hoover
- Extended Abstract: Trustworthy System Security through 3-D Integrated Hardware
- On the Limits of Leakage Power Reduction in Caches Yan Meng, Timothy Sherwood and Ryan Kastner
- To appear in the 25th IEEE International Parallel & Distributed Processing Symposium (IPDPS'11) Exploiting Data Similarity to Reduce Memory
- A Case Study of Multi-Threading in the Embedded Space Greg Hoover
- In Proceedings of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2006) Modeling TCAM Power for Next Generation Network Devices
- Dynamically Configurable Shared CMP Helper Engines for Improved Performance
- 554 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 16, NO. 5, MAY 2008 Ternary CAM Power and Delay Model
- A High Throughput String Matching Architecture for Intrusion Detection and Prevention
- Formulating and Implementing Profiling over Adaptive Ranges
- Journal of Instruction-Level Parallelism 8 (2006) 1-20 Submitted 10/05; published 04/06 An Evaluation of Deeply Decoupled Cores
- VrtProf: Vertical Profiling for System Virtualization Hussam Mousa, Kshitij Doshi, Timothy Sherwood and Elmoustapha Ould-Ahmed-Vall
- IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 20, NO. 11, NOVEMBER 2001 1355 Bitwidth Cognizant Architecture Synthesis of Custom
- State Semantics of Erasure in Sketch Applications Jeffrey Browne
- Towards Chip-Scale Plasmonic Interconnects Hassan M. G. Wassel1
- Hybrid CMOS/Nanodevice Circuits for High Throughput Pattern Matching Applications
- Preventing PCM Banks from Seizing Too Much Power Andrew Hay Karin Strauss
- A N I N T E R N AT I O N A L www.ULJournal.com
