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Tan, Sheldon X.-D. - Department of Electrical Engineering, University of California at Riverside
Statistical Modeling and Analysis of Chip-Level Leakage Power by Spectral Stochastic Method
Composable Thermal Modeling and Characterization for Fast Temperature Estimation
Improving the Reliability of On-Chip Data Caches Under Process Variations Dept. of Computer Science
Fast Thermal Simulation for Run-Time Temperature Tracking and Management
A Fast Architecture-Level Thermal Analysis Method for Runtime Thermal Regulation
Efficient Thermal Simulation for Run-Time Temperature Tracking and Management
Parameterized Transient Thermal Behavioral Modeling For Chip Multiprocessors
Architecture Level Thermal Modeling for Multi-Core Systems using Subspace System
Architecture-level Thermal Behavioral Characterization For Multi-Core Microprocessors
This article appeared in a journal published by Elsevier. The attached copy is furnished to the author for internal non-commercial research
Fast Thermal Simulation for Architecture Level Dynamic Thermal Management
General Behavioral Thermal Modeling and Characterization for Multi-core Microprocessor Design
A Linear Algorithm for Full-Chip Statistical Leakage Power Analysis Considering Weak Spatial Correlation
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 17, NO. 10, OCTOBER 2009 1495 Architecture-Level Thermal Characterization
A Systematic Method For Functional Unit Power Estimation in Microprocessors
FEKIS: A Fast Architecture-level Thermal Analyzer for Online Thermal Regulation
Architecture-level Thermal Behavioral Models For Quad-Core Microprocessors
A Linear Statistical Analysis for Full-Chip Leakage Power with Spatial Correlation
Parameterized Architecture-Level Dynamic Thermal Models for Multicore