- Verifying Safety Properties of a PowerPCTM Microprocessor Using Symbolic Model Checking
- The Complexity of Propositional Linear Temporal Logics A. P. SISTLA
- Efficient Filtering in PublishSubscribe Systems using Binary Decision Diagrams
- Using Cutwidth to Improve Symbolic Simulation and Boolean Satisfiability Dong Wang Edmund Clarke
- Modular Verification of Software Components in C Sagar Chaki Edmund Clarke Alex Groce
- First International Workshop on Symbolic Model Checking Combining Local and Global Model Checking
- A Language for Compositional Specification and
- Ensuring the correctness of computer systems used in life-critical applications is very difficult. The most commonly
- Model Checking Edmund M. Clarke
- The Verus Tool: A Quantitative Approach to the Formal Verification of RealTime Systems 1
- Verifying Parameterized Networks E. M. CLARKE
- On Effective Axiofnatizations of Hoare Logics Edmund M. Clarke, Jr.l, Steven M. Germanl'3, and Joseph Y. Halpernl'2
- ComputerAided Verification E. M. Clarke
- Electronic Notes in Theoretical Computer Science 22 (1999) URL: http://www.elsevier.nl/locate/entcs/volume22.html 26 pages
- Spectral Transforms for Large Boolean Functions with Applications to Technology Mapping *
- Proving the Correctness of Coroutines without History
- Automatic Verification Of Finite State Concurrent Systems Using Temporal Logic Specifications: A Practical Approach*
- Analytica ---An Experiment in Combining Theorem Proving and Symbolic Computation \Lambda
- Formal Methods: State of the Art and Future Directions EDMUND M. CLARKE, JEANNETTE M. WING, ET AL.1
- Hybrid Decision Diagrams Overcoming the Limitations of MTBDDs and BMDs
- System Description: Analytica 2 Edmund Clarke, Michael Kohlhase, Joel Ouaknine, Klaus Sutner
- Reasoning About Networks With Many Identical Finite-State Processes E. M. Clarke
- System Description: Analytica 2 Edmund Clarke, Michael Kohlhase, Joel Ouaknine, Klaus Sutner
- Combining symbolic computation and theorem proving: some problems of Ramanujan
- Efficient Verification of Sequential and Concurrent C Programs
- Int J STTT (1999) 2: 279287 1999 Springer-Verlag State space reduction using partial order techniques
- Programming Language Constructs for Which It Is Impossible To Obtain Good Hoare Axiom Systems
- Behavioral Consistency of C and Verilog Programs Using Bounded Model Checking
- Verification of Hybrid Systems Based on Counterexample-Guided Abstraction Refinement
- Using Combinatorial Optimization Methods for Quantification Scheduling
- Efficient Filtering in Publish-Subscribe Systems using Binary Decision Diagrams
- A Theory of Consistency for Modular Synchronous Systems
- J.-P. Katoen (Ed.): ARTS'99, LNCS 1601, pp. 96-110, 1999. Springer-Verlag Berlin Heidelberg 1999
- Verifying IP-Core based System-On-Chip Designs Pankaj Chauhan, Edmund M. Clarke, Yuan Lu and Dong Wang
- Symbolic Model Checking using SAT procedures instead of BDDs A. Biere1;2, A. Cimatti3, E.M. Clarke1;2, M. Fujita4, Y. Zhu1;2
- Verifying the Performance of the PCI Local Bus using Symbolic Techniques
- Computing Quantitative Characteristics of Finite-State Real-Time Systems *
- Escher--A Ge(ometricaI Layout System For Recursively Defined Circuits
- THE COMPLEXITY OF PROPOSITIONAL LINEAR TEMPORAL LOGICS A. P. Sistla and E. M. Clarke
- CAN MESSAGE BUFFERS BE CHARACTERIZED IN LINEAR TEMPORAL LOGIC? A. P. Sistla
- Compositional Reasoning in Model Checking ? Sergey Berezin1
- TR 26/98 University of Karlsruhe Combining Local and Global Model Checking
- Using Combinatorial Optimization Methods for Quantification Scheduling
- The Verus Language: Representing Time efficiently with BDDs 1
- A failed attempt to optimize variable ordering with tools for Constraints Solving
- Verifying IPCore based SystemOnChip Designs \Lambda Pankaj Chauhan, Edmund M. Clarke, Yuan Lu and Dong Wang
- TR 26/98 University of Karlsruhe Combining Local and Global Model Checking ?
- RealTime Symbolic Model Checking for Discrete Time Models
- Software Tools for Technology Transfer manuscript No. (will be inserted by the editor)
- Analytica ---An Experiment in Combining Theorem Proving and Symbolic Computation
- Specifying and Verifying Systems with Multiple Clocks Edmund M. Clarke, Daniel Kroening, and Karen Yorav
- Completeness and Complexity of Bounded Model Checking
- State/Event-based Software Model Checking ? Sagar Chaki Edmund M. Clarke Joel Ouaknine
- A Theory of Consistency for Modular Synchronous Systems ?
- VeriAgent: an Approach to Integrating UML and Formal Verification Tools
- An Improved Algorithm for the Evaluation of Fixpoint Expressions \Lambda
- DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY 38050 Povo Trento (Italy), Via Sommarive 14
- INFORMATION AND COMPUTATION 98, 142-170 (1992) Symbolic Model Checking: IO*' States and Beyond*
- Sequential Circuit Verification Using Symbolic Model Checki:ng
- Compiling Path Expressions into VLSI Circuits `I`. S. Annntharaman
- Efficient Verification of Sequential and Concurrent C S. Chaki (chaki@cs.cmu.edu)
- Progress on the State Explosion Problem in Model Checking ?
- Verification of All Circuits in a FloatingPoint Unit Using WordLevel Model Checking
- 4. Case g = g 1 U g 2 . ()) Assume that j j= g 1 U g 2 , then for some l j, l j= g 2 and for all j i ! l, i j= g 1 . By the induction hypothesis, s l 2 sat(g 2 ) and therefore s l 2 sat(g 1 U g 2 ). By the definition
- NuSMV 2: An OpenSource Tool for Symbolic Model Checking
- istituto per la ricerca scientifica e tecnologica
- Electronic Notes in Theoretical Computer Science 23 No. 2 (1999) URL: http://www.elsevier.nl/locate/entcs/volume23.html 13 pages
- Symbolic Model Checking for Probabilistic Processes Christel Baier1
- Modular Verification of Software Components in C # Sagar Chaki Edmund Clarke Alex Groce
- Efficient Verification of Parallel Real--Time Systems Tomohiro Yoneda 1 , Atsufumi Shibayama 1 ,
- Hardware Verification using ANSI-C Programs as a Reference Edmund Clarke Daniel Kroening
- Compositional Model Checking E. M. Clarke D. E. Long K. L. McMillan
- [10] S. V. Campos, E. M. Clarke, W. Marrero, M. Minea, and H. Hiraishi. Computing quantitative characteristics of finitestate realtime systems. In IEEE RealTime Systems Symposium, 1994.
- for eondit
- Verus: A Tool for Quantitative Analysis of FiniteState RealTime Systems \Lambda
- NUSMV: a new symbolic model checker A. Cimatti 1 E. Clarke 2 F. Giunchiglia 1 M. Roveri 1;3
- The Verus Language: Representing Time Efficiently with BDDs
- NUSMV: a new Symbolic Model Verifier A. Cimatti 1 E. Clarke 2 F. Giunchiglia 1 M. Roveri 1;3
- Ecient Veri cation of Sequential and Concurrent C Programs
- Hybrid Decision Diagrams Overcoming the Limitations of MTBDDs and BMDs
- Partial Order Reductions for Security Protocol Verification
- Program Slicing of Hardware Description E. M. Clarke1,6
- Bounded Model Checking Using Satisfiability Solving Edmund Clarke1, Armin Biere2, Richard Raimi3, and Yunshan Zhu4
- Avoiding The State Explosion Problem In Temporal Logic Model Checking Algorithms
- Verification of All Circuits in a FloatingPoint Unit Using WordLevel Model Checking
- Non-linear Quantification Scheduling in Image Computation
- Automatic Verification of Finite-State Concurrent Systems Using Temporal Logic
