- k k k
- Lengthening Traces to Improve Opportunities for Dynamic Optimization
- A Probabilistic Pointer Analysis for Speculative Optimizations
- Fine-Grain Performance Scaling of Soft Vector Processors Peter Yiannacouras, J. Gregory Steffan, and Jonathan Rose
- Application-Specific Customization of Soft Processor Microarchitecture
- IMPROVING PIPELINED SOFT PROCESSORS WITH MULTITHREADING Martin Labrecque and J. Gregory Steffan
- Understanding Bloom Filter Intersection for Lazy Address-Set Disambiguation
- NetTM: Faster and Easier Synchronization for Soft Multicores via Transactional Memory
- The Case for Hardware Transactional Memory in Software Packet Processing
- Efficient Multi-Ported Memories for FPGAs Charles Eric LaForest and J. Gregory Steffan
- DATA PARALLEL FPGA WORKLOADS: SOFTWARE VERSUS HARDWARE Peter Yiannacouras, J. Gregory Steffan, and Jonathan Rose
- Caliper: A Tool to Generate Precise and Closed-loop Traffic Monia Ghobadi
- DART: Fast and Flexible NoC Simulation using FPGAs Danyao Wang, Natalie Enright Jerger, and J. Gregory Steffan
- Improving Memory System Performance for Soft Vector Peter Yiannacouras, J. Gregory Steffan, and Jonathan Rose
- The Potential for Variable-Granularity Access Tracking for Optimistic Parallelism
- FPGA-Based Soft Vector Processors Peter Yiannacouras
- A GPU-INSPIRED SOFT PROCESSOR FOR HIGH-THROUGHPUT ACCELERATION
- Towards a Compilation Infrastructure
- Improving Cache Locality for Thread-Level Speculation Stanley L.C. Fung and J. Gregory Steffan
- The STAMPede Approach to Thread-Level Speculation
- A GPU-INSPIRED SOFT PROCESSOR FOR HIGH-THROUGHPUT ACCELERATION Jeffrey Kingyens and J. Gregory Steffan
- Exploration and Customization of FPGA-Based Soft Processors
- Custom Code Generation for Soft Processors Martin Labrecque, Peter Yiannacouras and J. Gregory Steffan
- Improving Cache Locality for Thread-Level Speculation Systems
- Scaling Soft Processor Systems Martin Labrecque, Peter Yiannacouras, and J. Gregory Steffan
- A GPU-Like Soft Processor for High-Throughput Acceleration
- FAST CRITICAL SECTIONS VIA THREAD SCHEDULING FOR FPGA-BASED MULTITHREADED PROCESSORS
- Parallelizing FPGA Placement Using Transactional Memory
- An FPGA-based Accelerator Platform for Network-on-Chip Simulation
- CMP Support for Large and Dependent Speculative Threads
- EFFICIENT MULTI-PORTED MEMORIES FOR FPGAS Charles Eric LaForest
- A Probabilistic Pointer Analysis for Speculative Optimizations Jeff Da Silva and J. Gregory Steffan
- The Potential for Thread-Level Data Speculation in Tightly-Coupled
- The Microarchitecture of FPGA-Based Soft Processors Peter Yiannacouras, Jonathan Rose, and J. Gregory Steffan
- NetFPGA-based Precise Traffic Generation Geoffrey Salmon, Monia Ghobadi,
- JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
- A Dynamic Instrumentation Approach to Software Transactional Memory
- NetThreads: Programming NetFPGA with Threaded Martin Labrecque, J. Gregory Steffan
- OVERLAY ARCHITECTURES FOR FPGA-BASED SOFTWARE PACKET PROCESSING Martin Labrecque
- Understanding and Improving Bloom Filter Configuration for Lazy Address-Set Disambiguation
- Supporting Efficient Collective Communication in NoCs , Natalie Enright Jerger
- Octavo: an FPGA-Centric Processor Family Charles Eric LaForest and J. Gregory Steffan
- Multi-Ported Memories for FPGAs via XOR Charles Eric LaForest, Ming G. Liu, Emma Rae Rapati, and J. Gregory Steffan
