Harrison, Reid R. - Department of Electrical and Computer Engineering, University of Utah

• Creating a GDS File for MOSIS Chip Fabrication The layout information of schematics that we create in `Cadence Virtuoso layout
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• Op-Amp Simulation Part II EE/CS 5720/6720
• SCMOS Layout Rules -Well Rule Description
• ECE/CS 5720/6720 Design Project Op-Amp Design
• EE/CS 6720 only (not required for EE/CS 5720 students) Journal Article Report 1
• How do we lay out a resistor? We make resistors using highres poly layer. Highres poly is not a physical layer on the
• Compensation Notes Compensation is a very important requirement for amplifier design. When feedback is
• ECE/CS 5720/6720 ECE/CS 5720/6720 Analog IC Design
• Introduction to MOSFET Operation R.R. Harrison Introduction to MOSFET Operation
• A Low-Power Analog VLSI Visual Collision Detector
• Wireless Integrated Circuit for 100-Channel Neural Stimulation
• 330 IEEE TRANSACTIONS ON NEURAL SYSTEMS AND REHABILITATION ENGINEERING, VOL. 17, NO. 4, AUGUST 2009 HermesC: Low-Power Wireless Neural Recording
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• A Wireless Neural Interface for Chronic Recording Reid R. Harrison1,2
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• COLLEGE OF ENGINEERING GUIDELINES http://www.coe.utah.edu Fall Semester 2009
• Using the HP 34401A Digital Multimeter (DMM) We will make frequency use of the HP 34401A multimeter in this lab. It is important to
• A Versatile Integrated Circuit for the Acquisition of Biopotentials
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 1, JANUARY 2007 123 A Low-Power Integrated Circuit for a Wireless
• R.R. Harrison, H. Fotowat, R. Chan, R.J. Kier, A. Leonardo, and F. Gabbiani, "A wireless neural/EMG telemetry system for freely moving insects," to appear in: Proceedings of the 2010 IEEE International Symposium on Circuits and Systems (ISCAS 2010), Paris
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• Abstract--The advent of microelectrode arrays allowing for the simultaneous recording of 100 or more neurons is
• 122 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 1, JANUARY 2004 CMOS Analog MAP Decoder
• 322 IEEE TRANSACTIONS ON NEURAL SYSTEMS AND REHABILITATION ENGINEERING, VOL. 17, NO. 4, AUGUST 2009 Wireless Neural Recording With Single
• 1950 IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING, VOL. 52, NO. 11, NOVEMBER 2005 Micropower Circuits for Bidirectional Wireless
• Abstract--We compare the performance of algorithms for automatic spike detection in neural recording applications.
• Abstract--Local field potentials (LFPs) in the brain are an important source of information for basic research and clinical
• LETTER Communicated by M. V. Srinivasan and Stephen DeWeerth A Silicon Implementation of the Fly's Optomotor Control
• To apppear in Autonomous Robots, ??, 1{13 (1999) c 1999 Kluwer Academic Publishers, Boston. Manufactured in The Netherlands.
• Small-Signal Concepts slope = dI/dV = G (conductance) = 1/R
• PSpice 9.2 Tutorial This tutorial is designed for the beginning student interested in
• CREATING BODE PLOTS USING PSPICE AND PSPICE A/D WITH SCHEMATICS In Schematics
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• UNIVERSITY OF UTAH ELECTRICAL ENGINEERING DEPARTMENT
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• MOSFET Operation in Weak and Moderate Inversion R.R. Harrison The MOS Transistor in Weak Inversion
• Journal Article Sign-up Sheet Active capacitor multiplier in Miller-compensated
• ECE/CS 5720/6720 Assignment for Week 2
• CS/EE 5720/6720 Analog IC Design Tutorial for Schematic Design and Analysis using Spectre
• Instances for NMOS & PMOS transistors For NMOS transistors, select NCSU_Analog_Parts library and choose N_Transistors in
• Printing output waveforms from the Waveform Editor Before you print your waveforms, ensure that the axes are clearly labeled, units
• Data Plotting and Curve Fitting in MATLAB Curve Fitting
• Op-Amp Simulation EE/CS 5720/6720
• ECE/CS 5720/6720 Layout Assignment 2 Op-Amp Layout
• ECE/CS 6720 only (not required for ECE/CS 5720 students) Journal Article Report 2
• ECE/CS 5720/6720: Design Project Pads Information The final step of your design project (if you have chosen to fabricate your circuit) will be
• Using the HP 33120A Function Generator The HP 33120A function generator is a versatile instrument capable of generating sine,
• Plotting Experimental Data Using MATLAB The Right and Wrong Way In this lab course, you will be taking experimental data from CMOS chips and plotting
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• 554 2006 IEEE International Solid-State Circuits Conference ISSCC 2006 / SESSION 30 / SILICON FOR BIOLOGY / 30.2
• Designing Efficient Inductive Power Links for Implantable Devices
• EE/CS 5720/6720 Layout Assignment 1 Basic Subcircuits
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 5, NO. 2, APRIL 2011 103 Wireless Neural/EMG Telemetry Systems
• EE/CS 5720/6720 CAD Assignment # 1
• 2308 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--I: REGULAR PAPERS, VOL. 52, NO. 11, NOVEMBER 2005 A Biologically Inspired Analog IC for Visual
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• EE 5720/6720 Process Parameters For all the Cadence-based assignments and projects in the class, you will be designing
• 958 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 6, JUNE 2003 A Low-Power Low-Noise CMOS Amplifier for
• ECE/CS 5720/6720 Book/MATLAB Assignment for Week 4
• Basic Differential Pair Layout Good matching in the absence of cross-chip gradients; both drain currents flow in same
• AN MDAC SYNAPSE FOR ANALOG NEURAL NETWORKS Ryan J. Kier*
• UNIVERSITY OF UTAH ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
• How do we lay out a capacitor? One way of making capacitors is to use the two polysilicon layers in our process. We
• photoreceptors multipliers
• 4 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 48, NO. 1, JANUARY 2001 A CMOS Programmable Analog Memory-Cell Array
• S TIT U T E O F Human retina (rods)
• The Design of Integrated Circuits to Observe