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Stan, Mircea R. - Department of Electrical and Computer Engineering, University of Virginia
Analog VLSI for Robot Path Planning Mircea Stan Wayne Burleson
Coding a Terminated Bus for Low Power Mircea R. Stan Wayne P. Burleson
Opamps as ``firm'' Virtual Components for SystemsonChip Mircea R. Stan, Rama R. Kotapally, Andrew Slutter
Low Threshold CMOS Circuits with Low Standby Current Mircea R. Stan
Synchronous Up/Down Counter with Period Independent of Counter Size
Low Power Architecture of the SoftOutput Viterbi David Garrett and Mircea Stan
Lowpower CMOS clock drivers Mircea R. Stan, Wayne P. Burleson
Power Reduction Techniques for a Spread Spectrum Based Correlator David Garrett (garrett@virginia.edu) and Mircea Stan (mircea@virginia.edu)
Limitedweight codes for lowpower I/O \Lambda Mircea R. Stan Wayne P. Burleson
LowPower FourQuadrant Multiplier Using DualGate Transistors Arnaud Forestier, Mircea R. Stan
Schematic Driven Layout for Analog and MixedSignal Design Page 1 of 6 Schematic Driven Layout Using the MOSIS Design Kit for
ISIT 1998, Cambridge, MA, USA, August 16 --August 21 Low Power Encoding for VLSI and ECC Duals
ECE 436 Laboratory 5 CCCCACHEACHEACHEACHE DDDDESIGNESIGNESIGNESIGN
LowPower Design Environment for MOSIS Page 1 of 6 LowPower Design Environment for MOSIS
ECE 436 Laboratory 2 INTERNAL DATA MOVEMENT AND CONTROLLER DESIGN
ECE 436 Laboratory 4 TARGETING THE XESS PROTO-BOARD AND PHYSICAL TESTING WITH A LOGIC ANALYZER
ECE 436 Laboratory 1 REGISTER AND ALU DESIGN