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Phatak, Dhananjay S. - Department of Computer Science and Electrical Engineering, University of Maryland, Baltimore County
Connectivity and Performance Tradeoffs in the Cascade Correlation Learning Architecture
Hybrid Signed Digit Representation for Low Power Arithmetic Circuits Dhananjay S. Phatak
Redundancy Management in Arithmetic Processing via Redundant Binary Representations
Complete and Partial Fault Tolerance of Feedforward Neural Nets
A Method to Merge Ensembles of Bagged or Boosted Forced-Split Decision Trees
Area Delay (A T) Efficient Multiplier Based on an Intermediate Hybrid SignedDigit (HSD1) Representation
Efficient Realization of Classification Using Modified Haar DWT
Relationship between fault tolerance, generalization and the VapnikChervonenkis (VC) dimension of feedforward ANNs.
Preemptive Routing in Ad Hoc Networks Tom Goff a Nael Abu-Ghazaleh b Dhananjay Phatak a
Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand Addition
Double Step Branching CORDIC : A New Algorithm for Fast Sine and Cosine Generation
Construction of Minimal n2n Encoders for Any n D. S. Phatak
IP-in-IP Tunneling to Enable the Simultaneous Use of Multiple IP Interfaces for Network Level Connection Striping
Constant-Time Addition and Simultaneous Format Conversion Based on Redundant Binary Representations
Hybrid SignedDigit Number Systems: A Unified Framework for
Comparison of Branching CORDIC Implementations Abhishek Singh, Dhananjay S Phatak, Tom Goff, Mike Riggs, James Plusquellic and Chintan Patel
A Novel Mechanism for Data Streaming Across Multiple IP Links for Improving Throughput and
Clustering for Personalized Mobile Web Usage Dhananjay S. Phatak, and Rory Mulvaney
Synthesis of Fault Tolerant Neural Networks Dhananjay S. Phatak and Elko Tchernev
Freeze-TCP: A true end-to-end TCP enhancement mechanism for mobile environments
Fault Tolerant Artificial Neural Networks Dhananjay. S. Phatak
Multiclass Multidimensional Modified Haar DWT for Classification Function