
- Multithreaded Reachability Debashis Sahoo
- A New Scheme for MemoryEfficient Probabilistic Verification
- To appear in Computer Aided Verification, 8th International Conference, July 1996. Protocol Verification by Aggregation of
- To appear in Int'l Conference on Computer Design: VLSI in Computers and Processors, 1993 Efficient Verification of Symmetric Concurrent Systems \Lambda
- FiniteState Analysis of SSL 3.0 John C. Mitchell Vitaly Shmatikov Ulrich Stern
- A Decision Procedure for Bit-Vectors and Arrays Vijay Ganesh and David L. Dill
- Multi-threaded Reachability Debashis Sahoo
- A Partitioning Methodology for BDD-based Verification
- CMC: A MODEL CHECKER FOR NETWORK PROTOCOL IMPLEMENTATIONS
- Deriving a Simulation Input Generator and a Coverage Metric
- A Specification Methodology by a Collection of Compact Properties as Applied to the Intel
- A Decision Procedure for an Extensional Theory of Arrays Aaron Stump, Clark W. Barrett, and David L. Dill
- Counter-Example Based Predicate Discovery in Predicate Abstraction ?
- Using Magnetic Disk instead of Main Memory in the Mur' Verifier
- To appear in Int'l Conf. on ComputerAided Verification, 1996 Verifying Systems with Replicated
- Formal Verification of OutofOrder Execution Using Incremental Flushing
- Improved Probabilistic Verification by Hash Ulrich Stern ? and David L. Dill
- Automatic Checking of Aggregation Abstractions
- Automatic Formal Verification of Block Cipher Implementations
- Checking Properties of Safety Critical Specifications Using Efficient Decision Procedures \Lambda
- Validation with Guided Search of the State Space C. Han Yang
- CMC: A Pragmatic Approach to Model Checking Real Code Madanlal Musuvathi
- The Pathalyzer: a Tool for Analysis of Signal Transduction Pathways
- PREDICATE ABSTRACTION a dissertation
- To appear in Int'l Conference on Computer Hardware Description Language, 1993 Better Verification Through Symmetry 1
- Reducing Manual Abstraction in Formal Verification of OutofOrder Execution
- PREDICATE ABSTRACTION a dissertation
- Verification by Approximate Forward and Backward Reachability \Lambda Shankar G. Govindaraju David L. Dill
- The Pathalyzer: a Tool for Analysis of Signal Transduction Pathways
- MonitorBased Formal Specification of PCI Kanna Shimizu 1 , David L. Dill 1 , and Alan J. Hu 2
- Java Model Checking David Y.W. Park Ulrich Stern David L. Dill
- Formally Verifying Data and Control with Weak Reachability Invariants
- Symbolic Simulation with Approximate Values ? Chris Wilson 1 and David L. Dill 1 and Randal E. Bryant 2
- WRITING, VERIFYING, AND EXPLOITING FORMAL SPECIFICATIONS FOR HARDWARE DESIGNS
- Monitor-Based Formal Specification of PCI
- A Partitioning Methodology for BDDbased Verification
- Number of Number of Number Products/ Transparent
- APPROXIMATE SYMBOLIC MODEL CHECKING USING OVERLAPPING PROJECTIONS
- To appear in Formal Methods in System Design, Vol. 9, Numbers 1/2, 1996 Better Verification Through Symmetry \Lambda
- A Decision Procedure for BitVectors and Arrays Vijay Ganesh and David L. Dill
- Parallelizing the Mur' Verifier Ulrich Stern ? and David L. Dill
- State Reduction Using Reversible Rules \Lambda C. Norris Ip David L. Dill
- Deriving a Simulation Input Generator and a Coverage Metric From a Formal Specification
- Modeling Hierarchical Combinational Circuits Jerry R. Burch, David Dill, Elizabeth Wolf and Giovanni De Micheli
- (To appear: Intl. Conf. on Formal Methods in ComputerAided Design (FMCAD), 1996) SelfConsistency Checking
- A Decision Procedure for an Extensional Theory of Arrays Aaron Stump, Clark W. Barrett, and David L. Dill
- Faster Proof Checking in the Edinburgh Logical Aaron Stump, David L. Dill
- Automatic Verification of the SCI Cache Coherence Protocol ?
- Improved Approximate Reachability using Auxiliary State Variables \Lambda Shankar G. Govindaraju, David L. Dill and Jules P. Bergmann
- WRITING, VERIFYING, AND EXPLOITING FORMAL SPECIFICATIONS FOR HARDWARE DESIGNS
- Published in Proceedings of 8th ACM Symposium on Parallel Algorithms and Architectures, pp. 288296, June, 1996 Verification of FLASH Cache Coherence Protocol
- HigherLevel Specification and Verification With BDDs ?
- FLoC Workshop on Symbolic Model Checking Preliminary Version Approximate Symbolic Model Checking using
- Successive Approximation of Abstract Transition Relations Satyaki Das and David L. Dill
- Unifying Synchronous/Asynchronous State Machine Synthesis \Lambda Kenneth Y. Yun David L. Dill
- rule (d2) calls Dep Reg() which returns true if the preceding instruction is writing the same register that is read by the fol
- A Specification Methodology by a Collection of Compact Properties
- A Partitioning Methodology for BDD-based Verification Debashis Sahoo
- Monitor-Based Formal Specification of PCI Kanna Shimizu1, David L. Dill1, and Alan J. Hu2
- Automated Analysis of Cryptographic Protocols Using Mur' John C. Mitchell Mark Mitchell Ulrich Stern
- To appear in Formal Methods in System Design Verifying Systems with Replicated Components in Mur' \Lambda
- A Speci cation Methodology by a Collection of Compact Properties as Applied to the Intel r
- Combining State Space Caching and Hash Ulrich Stern \Lambda and David L. Dill
- CMC: A MODEL CHECKER FOR NETWORK PROTOCOL IMPLEMENTATIONS
- Modern, high performance microprocessors are extremely complex machines which require substantial validation effort to
- FORMAL VERIFICATION TECHNIQUES FOR DIGITAL SYSTEMS
- New Techniques for Efficient Verification with Implicitly Conjoined BDDs \Lambda Department of Computer Science
- Efficient Verification with BDDs using Implicitly Conjoined Invariants ?
- Protocol Verification as a Hardware Design Aid \Lambda David L. Dill Andreas J. Drexler Alan J. Hu C. Han Yang
- We implemented our controllers using basic gates (24 input NANDs, 23 input NORs, buffers, inverters) and levelsensitive
- CounterexampleGuided Choice of Projections in Approximate Symbolic Model Checking \Lambda
- The Mur' Verification System David L. Dill
- Experience with Predicate Abstraction ? Satyaki Das 1 , David L. Dill 1 , and Seungjoon Park 2
- Reducing BDD Size by Exploiting Functional Dependencies \Lambda Alan J. Hu and David L. Dill
- A Partitioning Methodology for BDDbased Verification Debashis Sahoo # , Subramanian Iyer + , Jawahar Jain, Christian Stangier,
- Practical Timing Analysis of Asynchronous Systems Using Time Separation of Events \Lambda
- Hazard % free free espresso Over Run
- Practical Generalizations of Asynchronous State Machines \Lambda Kenneth Y. Yun David L. Dill Steven M. Nowick
- (In IEEE International Conference on ComputerAided Design (ICCAD), 1995) Efficient Validity Checking for Processor Verification \Lambda
- Static Analysis to Identify Invariants in RSML Specifications ?
- Approximate Reachability with BDDs using Overlapping Projections \Lambda Shankar G. Govindaraju 1 , David L. Dill 1 , Alan J. Hu 2 , and Mark A. Horowitz 1
- Reliable Verification Using Symbolic Simulation with Scalar Values \Lambda
- Deriving a Simulation Input Generator and a Coverage Metric From a Formal Specification
- CMC: A Pragmatic Approach to Model Checking Real Code Madanlal Musuvathi # , David Y.W. Park + , Andy Chou,
- A HighPerformance Asynchronous SCSI Controller \Lambda Kenneth Y. Yun
- Specification Implementation States / Primary State Product Terms Literals Cycle
- Theory Comput. Systems 31, 355376 (1998) 1998 Springer-Verlag