- The Impulse Memory Controller Lixin Zhang, Zhen Fang, Mike Parker, Binu K. Mathew, Lambert Schaelicke,
- Impulse: Building a Smarter Memory Controller John Carter, Wilson Hsieh, Leigh Stoller, Mark Swansony, Lixin Zhang,
- A Cost Framework for Evaluating Integrated Restructuring Optimizations
- Design Alternatives for Shared Memory Multiprocessors John Carter, ChenChi Kuo, Ravindra Kuramkote, and Mark Swanson \Lambda
- Algorithmic Foundations for a Parallel Vector Access Memory System Binu K. Mathew, Sally A. McKee, John B. Carter, Al Davis
- Avalanche: A Communication and Memory Architecture for Scalable Parallel Computing
- Impulse: Memory System Support for Scientific Applications John B. Carter, Wilson C. Hsieh, Leigh B. Stoller,
- A Simple COMA Implementation Review draft
- Adaptive Software Cache Management for Distributed Shared Memory Architectures
- Highly Efficient Synchronization Based on Active Memory Operations Lixin Zhang Zhen Fang and John B. Carter
- A Cost Model For Integrated Restructuring Optimizations Bharat Chandramouli Wilson C. Hsieh and John B. Carter Sally A. McKee
- Restructuring Computations for Temporal Data Cache Locality
- Safely Harnessing Wide Area Surrogate Computing -or-How to Avoid Building the Perfect Platform for Network Attacks
- A Lightweight Secure Cyber Foraging Infrastructure for Resource-Constrained Sachin Goyal and John Carter
- Supporting Persistent C++ Objects in a Distributed Storage System Anand Ranganathan, Yury Izrailevsky, Sai Susarla, John Carter, and Gary Lindstrom
- An Argument for Simple COMA Ashley Saulsbury, Tim Wilkinson \Lambda , John Carter y ,
- Reevaluating Online Superpage Promotion with Hardware Support Zhen Fang, Lixin Zhang, John B. Carter, Wilson C. Hsieh, Sally A. McKee
- MPLOCKs: Replacing H/WSynchronization Primitives with Message Passing
- Memory System Support for Image Processing Lixin Zhang, John B. Carter, Wilson C. Hsieh, Sally A. McKee
- TECHNICAL PAPER Reducing Consistency Traffic and Cache Misses
- Design of a Parallel Vector Access Unit for SDRAM Memory Systems Binu K. Mathew, Sally A. McKee, John B. Carter, Al Davis
- Reducing Consistency Traffic and Cache Misses in the Avalanche Multiprocessor
- Analysis of Avalanche's Shared Memory Architecture Ravindra Kuramkote, John Carter, Alan Davis,
