- THE DESIGN AND APPLICATION OF BEE2 --A HIGH-END RECONFIGURABLE COMPUTING SYSTEM
- FIELD PROGRAMMABLE LOGIC AND APPLICATIONS Defect tolerance in multiple-FPGA systems
- Workloads of the Future Jan M. Rabaey, Daniel Burke, Ken Lutz, and John Wawrzynek
- A Corner-Turn FPGA Architecture Nicholas Weaver
- RAMP BLUE: A MESSAGE-PASSING MANYCORE SYSTEM IN FPGAS Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg Gibeling, Pierre-Yves Droz
- Stochastic spatial routing for reconfigurable networks Andre DeHon *, Randy Huang, John Wawrzynek
- Stream computations organized for reconfigurable execution Andre DeHon *, Yury Markovsky, Eylon Caspi, Michael Chu, Randy Huang,
- DEFECT TOLERANCE IN MULTIPLE-FPGA SYSTEMS Zohair Hyder, John Wawrzynek
- On the opportunity to improve system yield with multi-core architectures
- A Design Methodology for Domain-Optimized Power-Efficient Supercomputing
- THE DESIGN AND APPLICATION OF A HIGH-END RECONFIGURABLE COMPUTING SYSTEM
- COMPUTE-RESOURCE ALLOCATION FOR MOTION ESTIMATION IN REAL-TIME VIDEO COMPRESSION
- ZUMA: A Platform for Smart-Home Environments* C.R. Baker, Y. Markovsky, J. van Greunen, J. Rabaey, J. Wawrzynek, A. Wolisz#
- ZUMA: A Platform for Smart-Home Environments The Case for Infrastructure*
- RAMP: RESEARCH ACCELERATOR FOR MULTIPLE PROCESSORS Abstract for Hotchips 2006
- C H A P T E R 8 PROGRAMMING STREAMING FPGA
