Razavi, Behzad - Electrical Engineering Department, University of California at Los Angeles

• 18.6 A 2GHz CMOS Image-RejectReceiver with Sign-Sign LMS Calibration
• A 900-MHz/f.$-GHz CMOS Transmitter for Dual-Band Applications
• SP 23.6: A 1.8GHz CMOS Voltage-Controlled Oscillator BehzadRazavi
• 2334 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 12, DECEMBER 2003 Brief Papers_______________________________________________________________________________
• 966 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: EXPRESS BRIEFS, VOL. 57, NO. 12, DECEMBER 2010 A New DAC Mismatch Shaping Technique for
• A New Receiver Architecture for Multiple-Antenna Systems Hamid Rafati and Behzad Razavi
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 6, JUNE 2007 1291 A Receiver Architecture for Dual-Antenna Systems
• This article describes recent activities in the area of RF integrated circuits First, transceiver architectures developed for cellular and cordless telephone standards are presented. Next, the choice of device technology is discussed, and the design of bu
• Design Requirements of 20-Gb/s Serial Links Using Multi-Tone Signaling
• A 2-GHz 1.6-mW Phase-Locked Loop Behzad h a v i
• 1999 IEEE International Solid-State Circuits Conference 0-7803-5129-0/99 IEEE 1999 TP 16.3 A CMOS Interface Circuit for Detection of
• WP 3.5: A 200MHz 15mW BiCMOS Sampleand-Hold Amplifier with3V Supply
• 472 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 31, NO. 4, APRIL 1996 A 2.5-Gb/s 15-mW Clock Recovery Circuit
• 2178 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 12, DECEMBER 1998 A 900-MHz/1.8-GHz CMOS
• A lO-Gb/s CMOS Clock and Data Recovery Circuit Jafar Savoj and Behzad Razavi
• Design of Half-Rate Clock and Data Recovery Circuits for Optical Communication Systems
• 1916 IEEE JOURNAL OF SOLID-STATE CIRCUITS. VOL. 27,NO. 12,DECEMBER 1992 Design Techniques for High-Speed, High-Resolution
• 366 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 3, MARCH 2001 A 125-MHz Mixed-Signal Echo Canceller for
• A Study of Injection Pulling and Locking in Oscillators Behzad Razavi
• CMOS Transceivers for the 60-GHz Band1 Behzad Razavi
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 44, NO. 3, MARCH 2009 751 A New Transceiver Architecture for the 60-GHz Band
• A 3-GHz 25-mW CMOS Phase-Locked Loop Behead Raeavi, Kwing F. Lee, Ran-Hong Yan, and Robert G. Swartl;
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 29, NO. 12, DECEMBER 1994 A 6 GHz 60 mW BiCMOS Phase-Locked Loop
• A 900-MHz CMOS Direct Conversion Receiver Behzad Razavi
• 432 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 3, MARCH 2001 A CMOS Clock Recovery Circuit
• A StabilizationTechnique for Phase-Locked Frequency Synthesizers
• 2138 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 12, DECEMBER 2003 10-Gb/s Limiting Amplifier and Laser/Modulator
• SSSCC94I SESSION 10I OPTICAL COMMUNICATIONI PAPER TP 10.5 TP 10.5: A 13.4-GHz CMOS Frequency Divider
• 308 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 3, MARCH 2000 An 8-Bit 150-MHz CMOS A/D Converter
• A 2.5-Gb/sec 15-mW BiCMOS Clock :Recovery Circuit Behzad Razavi and James Sung
• 2000 IEEE International Solid-State Circuits Conference 07803-5853-8/00 2000 IEEE TA 9.7 A 622Mb/s 4.5pA/Hz CMOS Transimpedance
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 12, DECEMBER 2007 2887 Heterodyne Phase Locking: A Technique for
• Mutual Injection Pulling Between Oscillators 1 Behzad Razavi
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 9, SEPTEMBER 2002 1135 Prospects of CMOS Technology for High-Speed
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 44, NO. 11, NOVEMBER 2009 3039 A 10-Bit 500-MS/s 55-mW CMOS ADC
• 2366 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 44, NO. 9, SEPTEMBER 2009 A 12-Bit 200-MHz CMOS ADC
• 1786 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--I: REGULAR PAPERS, VOL. 56, NO. 8, AUGUST 2009 The Role of PLLs in Future Wireline Transmitters
• 450 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 44, NO. 2, FEBRUARY 2009 Systematic Transistor and Inductor Modeling for
• 60Cheap silicon transceivers broadcasting in this
• 888 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 6, JUNE 2003 A Stabilization Technique for Phase-Locked
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 5, MAY 2001 761 A 10-Gb/s CMOS Clock and Data Recovery Circuit
• 810 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 5, MAY 2001 A 5.2-GHz CMOS Receiver with 62-dB
• 788 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 5, MAY 2000 A 2.6-GHz/5.2-GHz Frequency Synthesizer in
• 1382 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 10, OCTOBER 1999 Brief Papers
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 5, MAY 1999 573 A 900-MHz/1.8-GHz CMOS
• 730 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 32, NO. 5, MAY 1997 A 2-GHz 1.6-mW Phase-Locked Loop
• 724 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 30, NO. 7, JULY 1995 Design of a 100-MHz 10-mW 3-V Sample-and-Hold
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 30, NO. 2, FEBRUARY 1995 101 Design of High-Speed, Low-Power
• IEEE JOURNAL OF .SOLID-STATE 12JRcuITs, VOL. 27, NO, 12, DECEMBER 1992 1667 A 12-b 5-MSample/s Two-Step CMOS A/D
• A Layout Technique for Millimeter-Wave PA Transistors1 ChuanKang Liang and Behzad Razavi
• 170 2010 IEEE International Solid-State Circuits Conference ISSCC 2010 / SESSION 8 / HIGH-SPEED WIRELINE TRANSCEIVERS / 8.8
• A CMOS ADC with 80-dB Dynamic Range and 31-MHz Signal Bandwidth
• A Fast Simulator for Pipelined A/D Converters Bibhu Datta Sahoo and Behzad Razavi
• U-PAS : A User-Friendly ADC Simulator for Courses on Analog Design
• 190 2008 IEEE International Solid-State Circuits Conference ISSCC 2008 / SESSION 9 / mm-Wave & PHASED ARRAYS / 9.6
• Design Considerations for Future RF Circuits 1 Behzad Razavi
• CMOS Transceivers at 60 GHz and Beyond 1 Behzad Razavi
• 428 2007 IEEE International Solid-State Circuits Conference ISSCC 2007 / SESSION 23 / BROADBAND RF AND RADAR / 23.6
• Frequency-Based Measurement of Mismatches Between Small Capacitors1
• Modeling Op Amp Nonlinearity in Switched-Capacitor Sigma-Delta Modulators1
• Multiband UWB Transceivers Behzad Razavi
• 216 2005 IEEE International Solid-State Circuits Conference 0-7803-8904-2/05/$20.00 2005 IEEE. ISSCC 2005 / SESSION 11 / ULTRA WIDEBAND SOLUTIONS / 11.9
• 1 2005 IEEE International Solid-State Circuits Conference 0-000-000-0/00/$10.00 2005 IEEE ISSCC 2005 / SESSION 18 / HIGH-SPEED INTERCONNECTS AND BUILDING BLOCKS / 18.1
• 2004 IEEE International Solid-State Circuits Conference 0-7803-8267-6/04 2004 IEEE |Vout| = |VX| = 1
• Modeling of Jitter in Bang-BangClock and Data Recovery Circuits'
• ISSCC 2003 / SESSION 13 / 40Gb/s COMMUNICATION ICS / PAPER 13.7 13.7 A 40Gb/s Clock and Data Recovery Circuit
• ISSCC 2003 / SESSION 10 / HIGH SPEED BUILDING BLOCKS / PAPER 10.8 10.8 10Gb/s Limiting Amplifier and Laser/Modulator
• ISSCC 2003 / SESSION 10 / HIGH SPEED BUILDING BLOCKS / PAPER 10.5 10.5 Broadband ESD Protection Circuits in
• 5.3 A 10Gb/s CMOS Clock and Data Recovery Circuit with Frequency Detection
• A 5.2-GHz CMOS Receiver with 62-dB Image Rejection Behzad Razavi
• CMOS RF Receiver Design for Wireless LAN Applications Behzad Razavi
• 1999 IEEE International Solid-State Circuits Conference 0-7803-5129-0/99 IEEE 1999 WP 23.6 A 2.6GHz/5.2GHz CMOS Voltage-Controlled
• TP 3.1: A 1.5V 900MHz Downconversion Mixer Behzad Razavi*
• 4 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--I: REGULAR PAPERS, VOL. 56, NO. 1, JANUARY 2009 Design of Millimeter-Wave CMOS Radios: A Tutorial
• ISSCC94I SESSION6/ CLOCK AND DATARECOVERY I PAPER TA 6.4 TA 6.4: A 6GHz 60mW BiCMOS Phase-LockedLoop
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 12, DECEMBER 2005 2555 A UWB CMOS Transceiver
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 31, NO. 3, MARCH 1996 331 A Study of Phase Noise in CMOS Oscillators
• A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology1 Behzad Razavi
• IEEE Communications Magazine August 2003144 0163-6804/03/$17.00 2003 IEEE TOPICS IN CIRCUITS FOR COMMUNICATIONS
• 594 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 4, APRIL 2004 A 40-GHz Frequency Divider in
• 188 2007 IEEE International Solid-State Circuits Conference ISSCC 2007 / SESSION 10 / mm-WAVE TRANSCEIVERS AND BUILDING BLOCKS / 10.1
• A 2.6-GHzE.2-GHz Frequency Synthesizer in 0.4-pm CMOS Technology
• 26.6 A 2.4GHZ 34mW CMOS Transceiver for Frequency-Hopping and Direct-SequenceApplications
• Challenges in the Design of Cognitive Radios1 Behzad Razavi
• Behzad Razavi s wireless products such as cellular phones become an
• 14.2 A 2.75Ws CMOS Clock Recovery Circuit with 6road Capture Range
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 12, DECEMBER 2003 2181 A 40-Gb/s Clock and Data Recovery Circuit in
• 268 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 3, MARCH 1999 CMOS Technology Characterization
• WP 2.4: A 12b 5MSl.s Two-stepCMOS AID Converter* Behzad Razavi and Bruce A. Wooley
• A merged equalizer/CDR circuit employs a parallel-path equalizer and triple-loop adaptation to achieve a binary
• 400 2005 IEEE International Solid-State Circuits Conference 0-7803-8904-2/05/$20.00 2005 IEEE. ISSCC 2005 / SESSION 21 / TD: RF TRENDS: ABOVE-IC INTEGRATION AND MM-WAVE / 21.6
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 9, SEPTEMBER 2004 1571 Brief Papers_______________________________________________________________________________
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 43, NO. 2, FEBRUARY 2008 477 A Millimeter-Wave CMOS Heterodyne Receiver
• 2090 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 43, NO. 9, SEPTEMBER 2008 A Millimeter-Wave Circuit Technique
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 9, SEPTEMBER 2004 1415 A Study of Injection Locking and Pulling
• 18 2009 IEEE International Solid-State Circuits Conference ISSCC 2009 / SESSION 4 / HIGH-SPEED DATA CONVERTERS / 4.6
• 620 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 4, APRIL 2001 Stacked Inductors and Transformers in
• LOW VOLTAGE TECHNIQUES FOR HIGH SPEED DIGITAL BIPOLAR CIRCUITS
• Phase-Locking in Wireline Systems: Present and Future1 Behzad Razavi
• 120 978-4-86348-010-0 2009 Symposium on VLSI Circuits Digest of Technical Papers Multi-Decade Carrier Generation for Cognitive Radios1
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 1, JANUARY 2006 17 A 60-GHz CMOS Receiver Front-End
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 12, DECEMBER 2004 2389 40-Gb/s Amplifier and ESD Protection Circuit in
• 8.2-1IEEE1998 FA 8.2: A 900MHz / 1.8GHz CMOS Receiver
• 332 lEEEJOURNAL OF SOLID-STATECIRCUITS,VOL. 29,NO, 3. MARCH 1994 Design Techniques for Low-Voltage
• 1326 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 30, NO. 12, DECEMBER 1995 A 200-MHz 15-mW BiCMOS
• 1542 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 8, AUGUST 2010 Cognitive Radio Design Challenges and Techniques
• IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 46, NO. 6, JUNE 2011 1321 Low-Power CMOS Equalizer Design
• 894 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 46, NO. 4, APRIL 2011 A 300-GHz Fundamental Oscillator
• 1956 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 46, NO. 9, SEPTEMBER 2011 Transmitter Linearization by Beamforming