- The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver
- A Self-Timed Real-Time Sorting Network Kenneth Y. Yun Supratik Chakraborty Kevin W. James
- Pausible Clocking Based Heterogeneous Systems Kenneth Y. Yun, Member, IEEE Ayoob E. Dooply, Student Member, IEEE
- A Scalable Priority Queue Manager Architecture for Output-Buffered ATM Switches
- Timing Analysis of Asynchronous Systems Using Time Separation of Events
- Automatic Synthesis of Extended Burst-Mode Circuits: Part I (Specification and Hazard-Free
- Automatic Synthesis of Extended Burst-Mode Circuits: Part II (Automatic Synthesis)
- Optimal Evaluation Clocking of Self-Resetting Domino Pipelines Kenneth Y. Yun Ayoob E. Dooply
- The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver
- Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders
- Timing Analysis for Extended Burst-Mode Circuits Supratik Chakrabortyy
- A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits
- High-Performance Asynchronous Pipeline Circuits Kenneth Y. Yun
- Optimizing average-case delay in technology mapping of burst-mode Peter A. Beerel
- Estimation and Bounding of Energy Consumption in Burst-Mode Control Circuits
- Performance-driven Synthesis of Asynchronous Controllers Kenneth Y. Yun Bill Liny David L. Dill Srinivas Devadasz
- Unifying Synchronous/Asynchronous State Machine Synthesis Kenneth Y. Yun David L. Dill
- SYNTHESIS OF ASYNCHRONOUS CONTROLLERS FOR HETEROGENEOUS SYSTEMS
- Automatic Synthesis of Extended BurstMode Circuits: Part II (Automatic Synthesis)
- Specification Implementation States / Primary State Product Terms Literals Cycle
- Optimal Clocking and Enhanced Testability for High-Performance Self-Resetting Domino Pipelines
- BDDBased Synthesis of Extended BurstMode Controllers
- Performancedriven Synthesis of Asynchronous Controllers Kenneth Y. Yun \Lambda Bill Lin y David L. Dill \Lambda\Lambda Srinivas Devadas z
- Average-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits
- A Self-Timed Real-Time Sorting Network Kenneth Y. Yun, Member, IEEE, Kevin W. James, Student Member, IEEE, Robert H. Fairlie-Cuninghame,
- Timing Analysis of Asynchronous Systems Using Time Separation of Events
- We implemented our controllers using basic gates (2-4 input NANDs, 2-3 input NORs, buffers, inverters) and level-sensitive
- Automatic Synthesis of Extended BurstMode Circuits Using Generalized Celements \Lambda
- A LowControlOverhead Asynchronous Differential Equation Solver \Lambda
- A Low-Power VLSI Architecture for Full-Search Block-Matching Motion Estimation
- Pausible Clocking: A First Step Toward Heterogeneous Systems Kenneth Y. Yun Ryan P. Donohue
- A Scalable Priority Queue Manager Architecture for OutputBuffered ATM Switches
- A SelfTimed RealTime Sorting Network Kenneth Y. Yun, Member, IEEE, Kevin W. James, Student Member, IEEE, Robert H. FairlieCuninghame,
- SYNTHESIS OF ASYNCHRONOUS CONTROLLERS FOR HETEROGENEOUS SYSTEMS
- Practical Timing Analysis of Asynchronous Circuits Using Time Separation of Supratik Chakraborty y
- Optimal Evaluation Clocking of SelfResetting Domino Pipelines # Kenneth Y. Yun Ayoob E. Dooply
- MinMax Timing Analysis and An Application to Asynchronous Circuits
- Optimal Clocking and Enhanced Testability for HighPerformance SelfResetting Domino Pipelines #
- The Design and Verification of A HighPerformance LowControlOverhead Asynchronous Differential Equation Solver
- Min-Max Timing Analysis and An Application to Asynchronous Circuits
- Average-Case Optimized Technology Mapping of One-Hot Domino Wei-chun Chouy Peter A. Beerely Ran Ginosarz Rakefet Kolz
- A High-Performance Asynchronous SCSI Controller Kenneth Y. Yun
- BDD-Based Synthesis of Extended Burst-Mode Controllers
- Automatic Synthesis of Extended Burst-Mode Circuits Using Generalized Kenneth Y. Yun
- AverageCase Optimized TransistorLevel Technology Mapping of Extended BurstMode Circuits #
- AverageCase Optimized Technology Mapping of OneHot Domino Circuits \Lambda
- The Design and Verification of A HighPerformance LowControlOverhead Asynchronous Differential Equation Solver
- Pausible Clocking: A First Step Toward Heterogeneous Systems \Lambda Kenneth Y. Yun Ryan P. Donohue
- Pausible Clocking Based Heterogeneous Systems Kenneth Y. Yun, Member, IEEE Ayoob E. Dooply, Student Member, IEEE
- A LowPower VLSI Architecture for FullSearch BlockMatching Motion Estimation
- A Low-Control-Overhead Asynchronous Di erential Equation Solver
- Synthesis of 3D Asynchronous State Machines 3 Kenneth Y. Yun David L. Dill Steven M. Nowick
- A SelfTimed RealTime Sorting Network # Kenneth Y. Yun+ Supratik Chakraborty# Kevin W. James+
- Automatic Synthesis of Extended BurstMode Circuits: Part I (Specification and HazardFree
- Practical Generalizations of Asynchronous State Machines Kenneth Y. Yun David L. Dill Steven M. Nowick
