Li, Zhiyuan - Department of Computer Sciences, Purdue University

• Energy cost analysis of IPSec on handheld devices Peifeng Ni, Zhiyuan Li*
• An Empirical Study of Fortran Programs for Parallelizing Compilers
• Reducing Communication Overhead in Large Eddy Simulation of Jet Engine Noise Yingchong Situ Lixia Liu Chandra S. Martha Matthew E. Louis
• Impact of Data Compression on Energy Consumption of WirelessNetworked Handheld Devices
• Interprocedural Analysis for Loop Scheduling and Data Allocation
• A Compiler Scheme for Reusing Intermediate Computation Results Yonghua Ding
• Experience with E cient Array Data Flow Analysis for Array Privatization1 Junjie Gu Zhiyuan Li Gyungho Leey
• Experience in the Automatic Parallelization of Four PerfectBenchmark Programs
• Computation Offloading to Save Energy on Handheld Devices: A Partition Scheme
• A Compiler Framework for Tiling ImperfectlyNested Loops \Lambda
• Task Allocation for Distributed Multimedia Processing on Wirelessly Networked Handheld
• New Tiling Techniques to Improve Cache Temporal Locality \Lambda
• Energy-Aware Scheduling for Real-Time Multiprocessor Systems with Uncertain Task Execution Time
• (c) Finally, we improve our solution considering the timeoverhead and the energy overhead of
• Efficient Interprocedural Array Dataflow Analysis for Automatic Program Parallelization \Lambda
• Data Locality Enhancement by Memory Reduction Yonghong Song
• Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays Department of Computer Sciences
• Energy Impact of Secure Computation on a Handheld Device # Zhiyuan Li + Rong Xu
• Compiler Algorithms for Event Variable Synchronization Center for Supercomputing Research and Development
• ASYNC Loop Constructs for Relaxed Synchronization
• Improving Data Locality by Array Contraction
• A Programming Environment with Runtime Energy Characterization for Energy-Aware Applications
• An Interprocedural Parallelizing Compiler and Its Support for Memory Hierarchy Research ?
• A Compiler-automated Array Compression Scheme for Optimizing Memory Intensive Programs
• Dependence-based Multi-level Tracing and Replay for Wireless Sensor Networks Debugging*
• Detection and Repair of Software Errors in Hierarchical Sensor Networks
• Integrating Parallelizing Compilation Technology and Processor Architecture for CostEffective Concurrent
• An Efficient Data Dependence Analysis for Parallelizing Compilers
• Interprocedural Analysis Based on Guarded Array Regions
• Automatic Tiling of Iterative Stencil Loops Zhiyuan Li and Yonghong Song
• A Compiler Analysis of Interprocedural Data Communication #
• A Report on Impact of Data Compression on Energy Consumption of WirelessNetworked Handheld Devices
• Energy Impact of Secure Computation on a Handheld Device Zhiyuan Li
• Array Privatization for Parallel Execution of Loops Department of Computer Science
• Exploiting Idle Register Classes for Fast Spill Destination Fang Lu, Lei Wang, Xiaobing Feng, Zhiyuan Li, Zhaoqing Zhang
• A Sample-Based Cache Mapping Scheme Department of Computer Sciences
• Impact of Cache Mapping on Memory Performance of a StrongArm Processor
• A Polynomial-Time Algorithm for Memory Space Yonghong Song Cheng Wang Zhiyuan Li
• Applying Array Contraction to A Sequence of DOALL Loops Yonghong Song
• Parametric Analysis For Adaptive Computation Offloading Department of Computer Science
• J. Parallel Distrib. Comput. 64 (2004) 740746 A computation offloading scheme on handheld devices
• High-Level Information An Approach for Integrating Front-End and Back-End Compilers
• Compiler Techniques for Concurrent Multithreading with Hardware Speculation
• Symbolic Array Data ow Analysis for Array Privatization and Program Parallelization 1
• Using Cache Mapping to Improve Memory Performance of Handheld Devices