- Joining Specification Statements K. Rustan M. Leino
- An Asynchronous FPGA with Two-Phase Enable-Scaled Routing
- SNAP: A Sensor-Network Asynchronous Processor Clinton Kelly, IV; Virantha Ekanayake; Rajit Manohar
- WidthAdaptive Data Word Architectures Rajit Manohar
- A Radiation Hardened Reconfigurable FPGA Shankarnarayanan Ramaswamy1
- An Analysis of Reshuffled Handshaking Expansions Rajit Manohar
- A Rate Matchingbased Approach to Dynamic Voltage Scaling David Biermann, Emin Gun Sirer, Rajit Manohar
- EnergyEfficient Pipelines John Teifel, David Fang, David Biermann, Clint Kelly, and Rajit Manohar
- A Three-Tier Asynchronous FPGA David Fang, Song Peng, Chris LaFrieda, and Rajit Manohar
- Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis John Teifel and Rajit Manohar
- Quasidelayinsensitive circuits are Turingcomplete y Rajit Manohar and Alain J. Martin
- The Energy and Entropy of VLSI Computations \Lambda Jos'e A. Tierno y , Rajit Manohar, and Alain J. Martin
- Self-Healing Asynchronous Arrays Song Peng and Rajit Manohar
- Programmable Asynchronous Pipeline Arrays John Teifel and Rajit Manohar
- Self-Timed Thermally-Aware Circuits David Fang, Filipp Akopyan, Rajit Manohar
- Yield Enhancement of Asynchronous Logic Circuits through 3-Dimensional Integration Technology
- A Case For Asynchronous Active Memories Rajit Manohar and Mark Heinrich
- Asynchronous DRAM Design and Synthesis Virantha N. Ekanayake and Rajit Manohar
- Asynchronous DRAM Design and Synthesis Virantha N. Ekanayake and Rajit Manohar
- Integrating Task and Data Parallelism with the Group Communication Archetype \Lambda
- An Event-Synchronization Protocol for Parallel Simulation of Large-Scale Wireless Networks
- Static Power Reduction Techniques for Asynchronous Circuits
- DATAFLOW NETWORKS FOR EVENT STREAM PROCESSING Rajit Manohar
- Precise Exceptions in Asynchronous Processors Rajit Manohar, Mika Nystr om, Alain J. Martin
- Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis John Teifel and Rajit Manohar
- An Operand-Optimized Asynchronous IEEE 754 Double-Precision Floating-Point Adder
- Programmable Asynchronous Pipeline Arrays John Teifel and Rajit Manohar
- Formal Aspects of Computing (1995) 7: 683--703 fl 1995 BCS
- An Ultra LowPower Processor for Sensor Networks Virantha Ekanayake, Clinton Kelly, IV, and Rajit Manohar
- Enabling Cognitive Architectures for UAV Mission Planning Jon C. Russo, Mohammed Amduka, and Boris Gelfand, Lockheed Martin Advanced Technology Laboratories
- A Case for Asynchronous Computer Architecture Rajit Manohar
- Projection: A Synthesis Technique for Concurrent Systems \Lambda Rajit Manohar
- Network on a Chip: Modeling Wireless Networks with Asynchronous VLSI
- Fault Detection and Isolation Techniques for Quasi DelayInsensitive Circuits Christopher LaFrieda and Rajit Manohar
- Reducing Power Consumption with Relaxed Quasi Delay-Insensitive Circuits
- Fault Detection and Isolation Techniques for Quasi Delay-Insensitive Circuits Christopher LaFrieda and Rajit Manohar
- Automated Synthesis for Asynchronous FPGAs Song Peng, David Fang, John Teifel, # and Rajit Manohar
- Non-Uniform Access Asynchronous Register Files David Fang, Rajit Manohar
- Slack Elasticity in Concurrent Computing Rajit Manohar and Alain J. Martin
- Highly Pipelined Asynchronous FPGAs John Teifel and Rajit Manohar
- A HighSpeed Clockless Serial Link Transceiver John Teifel and Rajit Manohar
- NonUniform Access Asynchronous Register Files David Fang, Rajit Manohar
- A Rate Matching-based Approach to Dynamic Voltage Scaling David Biermann, Emin Gun Sirer, Rajit Manohar
- Address-Event Communication Using Token-Ring Mutual Exclusion
- The Entropy of Traces in Parallel Computation Rajit Manohar
- Asynchronous Parallel Prefix Computation Rajit Manohar \Lambda
- BitSNAP: Dynamic Significance Compression For a LowEnergy Sensor Network Asynchronous Processor
- Performance and Portability of an Air Quality Model Donald Dabdub
- DENSE SENSOR NETWORKS THAT ARE ALSO ENERGY EFFICIENT: WHEN 'MORE' IS 'LESS'
- A High-Performance Asynchronous FPGA: Test Results David Fang, John Teifel, and Rajit Manohar
- The Design of an Asynchronous MIPS R3000 Microprocessor
- Network on a Chip: Modeling Wireless Networks with Asynchronous VLSI
- Reconfigurable Asynchronous Logic Rajit Manohar
- An EventSynchronization Protocol for Parallel Simulation of LargeScale Wireless Networks
- Automated Synthesis for Asynchronous FPGAs Song Peng, David Fang, John Teifel,
- -DATAFLOW NETWORKS FOR EVENT STREAM PROCESSING Rajit Manohar
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- Variability in 3-D Integrated Circuits Filipp Akopyan, Carlos Tadeo Ortega Otero, David Fang, Sandra J. Jackson and Rajit Manohar
- Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
- Efficient Failure Detection in Pipelined Asynchronous Circuits Song Peng and Rajit Manohar
- Fault Tolerant Asynchronous Adder through Dynamic Self-reconfiguration
- BitSNAP: Dynamic Significance Compression For a Low-Energy Sensor Network Asynchronous Processor
- An Ultra Low-Power Processor for Sensor Networks Virantha Ekanayake, Clinton Kelly, IV, and Rajit Manohar
- Highly Pipelined Asynchronous FPGAs John Teifel and Rajit Manohar
- A High-Speed Clockless Serial Link Transceiver John Teifel and Rajit Manohar
- Power Optimal Routing in Wireless Networks Rajit Manohar and Anna Scaglione
- The Entropy of Traces in Parallel Computation Rajit Manohar
- Quasi-delay-insensitive circuits are Turing-completey Rajit Manohar and Alain J. Martin
- A Level-Crossing Flash Asynchronous Analog-to-Digital Converter Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel
- A Digital Neurosynaptic Core Using Embedded Crossbar Memory with 45pJ per Spike in 45nm
- Energy-Efficient Pipeline Templates for High-Performance Asynchronous Circuits
