- ISCAS2000 -IEEEInternationalSymposiumon Circuits and Systems,May 28-31, 2000, Geneva, Switzerland EFFICIENT COMMON-MODEFEEDBACK CIRCUITS FOR PSEUDO-DIFFERENTIAL
- A Tunable Duty-Cycle-Controlled Switched-R-MOSFET-C CMOS Filter for Low-Voltage and High-Linearity Applications
- A Fully Digital Technique for the Estimation and Correction of the DAC Error in Multi-bit Delta Sigma ADCs.
- A 100-dB gain-corrected delta-sigma audio DAC with headphone Ruopeng Wang Sang-Ho Kim Sang-Hyeon Lee
- 2398 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 12, DECEMBER 2005 A 0.6-V 82-dB Delta-Sigma Audio ADC Using
- 422 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 2, FEBRUARY 2005 Noise-Shaping Techniques Applied to
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: EXPRESS BRIEFS, VOL. 51, NO. 5, MAY 2004 269 A 2.5-V 10-b 120-MSample/s CMOS Pipelined ADC
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: EXPRESS BRIEFS, VOL. 51, NO. 3, MARCH 2004 105 Continuous-Time Filter Design Optimized for
- 298 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--I: REGULAR PAPERS, VOL. 51, NO. 2, FEBRUARY 2004 CMOS Implementation of Nonlinear
- IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 51, NO. 4, AUGUST 2002 853 A Two-Chip Interface for a MEMS Accelerometer
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 49, NO. 5, MAY 2002 321 Spectral Analysis of Time-Domain
- IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 10, OCTOBER 2000 1437 A CMOS Self-Calibrating Frequency Synthesizer
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 7, JULY 2000 629 Adaptive Digital Correction of Analog Errors
- 102 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 44, NO. 2, FEBRUARY 1997 Background Digital Calibration Techniques
- Reducing the Effects of Component Mismatch by Using Relative Size Information
- Low-Power and High-Speed Pipelined ADC Using Time-Aligned CDS Technique
- A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement
- Mixed-Order Sturdy MASH -Modulator N. Maghari, S. Kwon, G. C. Temes, and U. Moon
- Periodic Steady-State Analysis of Oscillators with a Specified Oscillation Frequency
- Dependence of LC VCO Oscillation Frequency on Bias Current Ting Wu, Un-Ku Moon, and Kartikeya Mayaram
- Vandepas 1 MAPLD2005/P230 Characterization of 1.2GHz Phase Locked Loops and Voltage Controlled
- A 10-Bit Algorithmic A/D Converter for Cytosensor Application Thirumalai Rengachari, Vivek Sharma, Gabor C. Temes, Un-Ku Moon
- 166 2005 IEEE International Solid-State Circuits Conference 0-7803-8904-2/05/$20.00 2005 IEEE. ISSCC 2005 / SESSION 9 / SWITCHED-CAPACITOR MODULATORS / 9.1
- A TUNABLE DUTY-CYCLE-CONTROLLED SWITCHED-R-MOSFET-C CMOS FILTER FOR LOW-VOLTAGE AND HIGH-LINEARITY APPLICATIONS
- A 0.9-V 10.7-MHz 3.6-mW Bandpass Modulator Using Unity-Gain-Reset Opamps Mustafa Keskin
- AMPLIFIER IMPERFECTION EFFECTS IN SWITCHED-CAPACITOR RESONATORS Mustafa Keskin
- A 0.9V 9mW 1MSPS DIGITALLY CALIBRATED ADC WITH 75dB SFDR Dong-Young Chang
- High-Speed Switched-Capacitor Filters Based on Unity Gain Buffers David Bruneau1
- RADIX-BASED DIGITAL CALIBRATION TECHNIQUE FOR MULTI-STAGE ADC Dong-Young Chang and Un-Ku Moon
- DIGITAL CORRELATION TECHNIQUE FOR THE ESTIMATION AND CORRECTION OF DAC ERRORS IN
- A 2.5V 10b 120 MSampleh CMOS Pipelined ADC with high SFDR Sang-Min Yoo*,Tae-Hwan Oh*,Jung-Woong Moon, Seung-Hoon Lee, and Un-Ku Moon'
- A 1-V, 10-MHz Clock-Rate, 13-Bit CMOS Modulator Using
- AREA EFFICIENT CMOS CHARGE PUMP CIRCUITS Ryan Perigny
- IMPROVED ADAPTIVE DIGITAL COMPENSATION FOR CASCADED ADCS Peter Kiss, Jose Silva, Un-Ku Moon, John T. Stonick, and Gabor C. Temes
- ISCAS 2000 -IEEE InternationalSymposiumon Circuits and Systems, May 28-31,2000, Geneva, Switzerland AN ADAPTIVE OFFSET CANCELLATIONMIXER FOR
- SWITCHED-CAPACITORCIRCUIT TECHNIQUES IN SUBMICRON LOW-VOLTAGE CMOS
- An error cancellation technique is described for suppressing capacitor mismatch in a successive approximation A/D converter.
- LOW-VOLTAGESWITCHED-CAPACITORCIRCUITS E. Bidari, M. Keskin, F: Maloberti*, U.Moon, J. Steensgaard and G.C. Temes
- Mismatch-Shaped Pseudo-Passive Two-Capacitor DAC Jesper Steensgaard,y Un-Ku Moon,y Gabor C. Temesy
- Design Techniques for Radiation Hardened Phase-Locked Loops Anantha Nag Nemmani
- Design of High-Performance Pipeline Analog-to-Digital Converters in LowVoltage Charles Grant Myers
- IMPLICATIONS OF JITTER ON HIGH SPEED SERIAL INTERFACE STANDARDS, SIMULATION, AND DESIGN
- A 10 Bit Algorithmic A/D Converter for a Biosensor Thirumalai Rengachari
- OP-AMP Free SC Biquad LPF and Delta-Sigma ADC submitted to
- A Continuous Time Frequency Translating Delta Sigma Modulator Anurag Pulincherry
- 20-Stage Pipelined ADC with Radix-Based Calibration Chong Kyu Yun
- Area Efficient D/A Converters For Accurate DC Operation Brandon Royce Greenley
- Area Efficiency Improvement of CMOS Charge Pump Circuits Ryan Perigny
- Error Canceling Low Voltage SAR-ADC Jianping Wen
- Low-Voltage Pipeline A/D Converter submitted to
- 246 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: EXPRESS BRIEFS, VOL. 52, NO. 5, MAY 2005 A Low-Voltage 10-Bit CMOS DAC in
- HIGH-SPEED PIPELINED A/D CONVERTER USING TIME-SHIFTED CDS TECHNIQUE Jipeng Li and Un-Ku Moon
- 540 2008 IEEE International Solid-State Circuits Conference ISSCC 2008 / SESSION 30 / DATA-CONVERTER TECHNIQUES / 30.1
- High-Performance Delta-Sigma Analog-to-Digital Converters Jose Barreiro da Silva
- 680 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: EXPRESS BRIEFS, VOL. 52, NO. 10, OCTOBER 2005 A Time-Delay Jitter-Insensitive Continuous-Time
- DESIGN TECHNIQUES FOR RADIATION HARDENED PHASE-LOCKED LOOPS
- Sturdy MASH D-S modulator N. Maghari, S. Kwon, G.C. Temes and U. Moon
- Digital Techniquesfor Improved AX Data Conversion J. Silva, X. Wang, P. Kiss, U. Moon and G. C. Temes
- DIGITAL CORRELATION TECHNIQUE FOR THE ESTIMATION AND CORRECTION OF DAC ERRORS IN
- Parameter Variation Analysis for Voltage Controlled Oscillators in Phase-Locked Loops
- Design Techniques for Low-Voltage Analog-to-Digital Converter
- EFFICIENT ERROR-CANCELLING ALGORITHMIC ADC Z. Zheng, B. Min, U. Moon and G. Temes
- A Stochastic Time-to-Digital Converter for Digital Phase-Locked Loops submitted to
- Low Power High Resolution Data Converter in Digital CMOS Technology Zhiliang Zheng
- AN EXTENDED RADIX-BASED DIGITAL CALIBRATION TECHNIQUE FOR MULTI-STAGE ADC
- 960 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 4, APRIL 2005 A 0.9-V 12-mW 5-MSPS Algorithmic ADC
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 50, NO. 9, SEPTEMBER 2003 531 Background Calibration Techniques for Multistage
- Enhanced Multi-bit Delta-Sigma Modulator with Two-Step Pipeline Quantizer
- Fig. 1. Simplified "Capacitor flip-around" switched capacitor circuit commonly used as a pipeline ADC MDAC.
- Multi-Loop Efficient Sturdy MASH Delta-Sigma Nima Maghari and Un-Ku Moon
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--I: REGULAR PAPERS, VOL. 51, NO. 11, NOVEMBER 2004 2133 Radix-Based Digital Calibration Techniques for
- Low-Voltage Switched-Capacitor Circuits Emad Bidari
- An On-chip Calibration Technique for Reducing Supply Voltage Sensitivity in Ring Oscillators Ting Wu, Kartikeya Mayaram, and Un-Ku Moon
- IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 7, JULY 2002 817 A 1-V 10-MHz Clock-Rate 13-Bit CMOS 16
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--I: REGULAR PAPERS, VOL. 52, NO. 1, JANUARY 2005 1 Sub-1-V Design Techniques for High-Linearity
- Low Voltage High-SNR Pipeline Data Converters Charles Myers, Jipeng Li, Dong-Young Chang, and Un-Ku Moon
- Analog (S)witchcraft, or How to Perform Accurate and Linear Data Conversion Using Inaccurate Nonlinear Elements
- Oscillators and Phase Locked Loops for Space Radiation Environments Martin Vandepas
- A Noise-Shaped Switched-Capacitor DC-DC Voltage Regulator A. Rao, W.McIntyre 1
- IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 4, APRIL 2007 775 An On-chip Calibration Technique for Reducing
- Fast Opamp-Free Delta Sigma Modulator Daniel E. Thomas
- LOWJOLTAGEPIPELINED ADC USING OPAMP-RESETSWITCHING TECHNIQUE Dong-YoungChang, Lei Wut, and Un-Ku Moon
- Low Voltage Switched Capacitor Circuits for Lowpass and Bandpass Converters
- A 1.4V 10b CMOS DC DAC in 0.Olmm' Brandon R. Greenley', Raymond L. Veithl, Dong-Young Chang2,and Un-Ku Moon3
- MISMATCH-SHAPING SERIAL DIGITAL-TO-ANALOG CONVERTER Jesper Steensgaard
- A Generic Multilevel Multiplying D/A Converter for Pipelined ADCs
- IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 6, JUNE 2006 1481 Comments and Correspondence
- 222 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: EXPRESS BRIEFS, VOL. 54, NO. 3, MARCH 2007 A Sub 1-V Constant GmC
- AN IMPROVED ALGORITHMIC ADC CLOCKING SCHEME Min Gyu Kim, Gil-Cho Ahn, and Un-Ku Moon
- LINEARITY IMPROVEMENT TECHNIQUE FOR CMOS CONTINUOUS-TIME FILTERS
- Digital Implementation of a Mismatch-Shaping Successive-Approximation ADC Matthew T. Coe
- ACKNOWLEDGEMENTS First and foremost, I would like to thank my advisor Dr. Un-Ku Moon for
- LOW-DISTORTION DELTA-SIGMA TOPOLOGIES FOR MASH ARCHITECTURES
- Mismatch-Shaping Successive-Approximation ADC Matthew Coe and Un-Ku Moon
- A 0.8V, 88dB Dual-Channel Audio DAC with Headphone Driver Qingdong Meng, Kyehyung Lee, Tetsuro Sugimoto1
- 212 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 2, FEBRUARY 2000 CMOS High-Frequency Switched-Capacitor Filters
- A SWITCHED-CAPACITOR DAC WITH ANALOG MISMATCH CORRECTION Un-Ku Moon, Jose Silva, Jesper Steensgaard and Gabor C. Temes
- center for design of analog-digital integrated circuits Adaptive Digital Compensation of Analog Circuit
- 1468 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 9, SEPTEMBER 2004 A 1.8-V 67-mW 10-bit 100-MS/s Pipelined ADC
- Investigation of a Noise-Shaping Accelerometer Interface Circuit for Two-Chip Implementation
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 49, NO. 9, SEPTEMBER 2002 635 Transactions Briefs__________________________________________________________________
- A 1.8 V CMOS DAC CELL WITH ULTRA HIGH GAIN OP-AMPIN 0.0143 mm2 Brandon R. Greeizley*t,Uiz-KuMoon*,and Raymond Veitht
- 0.9V 12mW 2MSPS Algorithmic ADC with 81dB SFDR Jipeng Li, Gil-Cho Ahn, Dong-Young Chang, and Un-Ku Moon
- A 1V 10b 60MS/s Hybrid Opamp-Reset/Switched-RC Pipelined ADC
- I. INTRODUCTION WITCHED capacitor circuits have become increasingly popular in recent years. This is due in large part to the availability
- A NOISE-SHAPING ACCELEROMETER INTERFACE CIRCUIT FOR TWO-CHIP IMPLEMENTATION
- LOW-VOLTAGELOW-SENSITIVITY SWITCHED-CAPACITORBANDPASS AC Mustafa Keskiiz, Un-KuMooiz and Gabor C. Temes
- Process-Independent Resistor Temperature-Coefficients using Series/Parallel and Parallel/Series Composite
- High-Speed CMOS Dual-Modulus Prescalers for Frequency Synthesis Ranganathan Desikachari
- Analysis of Supply and Ground Noise Sensitivity in Ring and LC Oscillators Volodymyr Kratyuk, Igor Vytyaz, Un-Ku Moon, Kartikeya Mayaram
- An Efficient Switched Capacitor Buck-Boost Voltage Regulator Using Delta-Sigma Control Loop
- Parameter Finding Methods for Oscillators with a Specified Oscillation Frequency
- An Adaptive PAM-4 5Gb/s Backplane Transceiver in 0.25 um CMOS Jeff Sonntag, John Stonick, James Gorecki', Bill Beale, Bill Check, Xue-Mei Gong, Joe Guiliano,
- Continuous-Time, Frequency Translating, Bandpass Delta-Sigma Modulator Anurag Pulincherry, Mike Hufford*, Eric Naviasky*, Un-ku Moon
- Generalized Radix Design Techniques for Low-Power, Low-Voltage Pipelined and Cyclic Analog-Digital Converters.
- LOW-VOLTAGESWITCHED-CAPACITORRESONATORS Mustafa Keskin, Un-KuMoon and Gabor C. Temes
- Design of High Efficiency Step-Down Switched Capacitor DC/DC Converter
- High-Speed Switched-Capacitor Filters Based On Unity-Gain Buffers David Bruneau
- IEEE Instrumentation and Measurement Technology Conference
- Parallel correlated double sampling technique for pipelined analogue-to-digital
- Accuracy Enhancement Techniques in Low-Voltage High-Speed Pipelined ADC Design
- MULTIBIT ADC WITH MIXED-MODE DAC ERROR CORRECTION Peter Kiss, Un-Ku Moon, Jesper Steensgaard, John T. Stonick, and Gabor C. Temes
- IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 8, AUGUST 2003 1401 A 1.4-V 10-bit 25-MS/s Pipelined ADC Using
- A Voltage-Mode Switched-Capacitor Bandpass Modulator Mustafa Keskin, Matthew E. Brown, Un-Ku Moon and Gbor C. Temes
