
- IEEE TRANSACTIONS ELECTRON DEVICES, VOL. OCTOBER Capacitance Reconstruction from Measured C--V in
- INVESTIGATION OF ESD PERFORMANCE IN ADVANCED CMOS TECHNOLOGY
- ACCURATE CV CHARACTERIZATION OF QUARTERMICRON MOS DEVICES USING QUANTUM MECHANICAL
- Accurate Modeling of Coulombic Scattering, and its Impact on Scaled MOSFETs Aon Mujtaba, Shinichi Takagi+, and Robert Dutton
- Advances in Numerical Methods for Convective Hydrodynamic Model of Semiconductor Devices
- Figure 3. The cross section of the simulated LDD nMOS with varying junction depth gate mask to adjust
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- Fig.11: Current during turnon Current, I e (t)
- An Overview of Mesh Generation 2.1 Introduction
- A Common Mesh Implementation for Both Static and Moving Boundary Process Simulations
- was obtained by calibrating the model to measured results. Fig. 4 Circuit schematic for simulating NMOSFET under ESD stress.
- Fig. 5: Two electrode switch built using the domain decomposition technique utilizing a combination of geometric etches and physical depositions. (a) A closeup of the center of the switch. (b) 3D view of the geometry. (c) The stepup.
- Introduction The rapid growth of wireless systems at radio frequencies
- GEOMETRIC ALGORITHMS AND SOFTWARE ARCHITECTURE FOR COMPUTATIONAL PROTOTYPING
- Modeling of MOS Scaling with Emphasis on Gate Tunneling and Source/Drain Resistance
- Implementation and Application 6.1 Introduction
- A set of virtual instruments based on computeraided design tools for technology (TCAD) are described. These virtual
- Abstract The harmonic balance method is a frequency domain analysis technique for simulating the large signal
- Mixed-Technology CAD for Integrated Systems--a confluence of electrical and mechanical perspectives
- CV and Gate Tunneling Current Characterization of Ultra-Thin Gate Oxide MOS (t=1.31.8 nm)
- LUMPED, INDUCTORLESS OSCILLATORS: HOW FAR CAN THEY GO? Reza Navid, Thomas H. Lee, and Robert W. Dutton
- HIGH FREQUENCY NOISE IN CMOS LOW NOISE AMPLIFIERS
- Log of 2nd Harmonic Distortion in Electron Conc. Emitter Base Collector
- IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 16, NO. 3, MARCH 2006 119 Model Dispersive Media in Finite-Difference
- IEEE ELECTRON DEVICE LETTERS, VOL. 27, NO. 6, JUNE 2006 489 Modeling of Charge Trapping Induced
- Mode-locking of monolithic laser diodes incorporating coupled-resonator optical
- 630 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 3, MARCH 2005 Minimum Achievable Phase Noise of RC Oscillators
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: EXPRESS BRIEFS, VOL. 52, NO. 3, MARCH 2005 149 An Analytical Formulation of Phase Noise of Signals
- Monte Carlo simulation of Joule heating in bulk and strained silicon and Robert W. Dutton
- A new method for sensitivity analysis of photonic crystal Georgios Veronis, Robert W. Dutton, and Shanhui Fan
- Coupled optical and electronic simulations of electrically pumped photonic-crystal-based LEDs
- Technology Limits and compact model for SiGe Scaled FETs Robert W. Dutton and Chang-Hoon Choi
- Modeling of Wave Behavior of Substrate Noise Coupling for Mixed-Signal IC Design
- Synthesized Compact Models (SCM) of Substrate Noise Coupling Analysis and Synthesis in Mixed-Signal ICs
- A CAD-Oriented Modeling Approach of Frequency-Dependent Behavior of Substrate Noise Coupling for Mixed-Signal IC Design
- Implications of gate tunneling and quantum effects on compact modeling in the gate-channel stack
- 1444 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 49, NO. 8, AUGUST 2002 Analysis and Design of Distributed ESD Protection
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 49, NO. 12, DECEMBER 2002 2171 Analysis of Nonuniform ESD Current Distribution
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 49, NO. 7, JULY 2002 1219 Series Resistance Calculation for Source/Drain
- IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 50, NO. 4, APRIL 2002 1127 Device-Level Simulation of Wave Propagation Along
- Investigation of Gate to Contact Spacing Effect on ESD Robustness of Salicided Deep Submicron Single Finger NMOS Transistors
- 394 WORKSHOP ON SYNTHESIS AND SYSTEM INTEGRATION OF MIXED TECHNOLOGIES Design Methodology for Power-Constrained Low Noise RF Circuits
- 1672 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 48, NO. 8, AUGUST 2001 Device Level Modeling of
- First principles investigation of scaling trends of zirconium silicate interface band offsets
- The Equivalence of van der Ziel and BSIM4 Models in Modeling the Induced Gate Noise of MOSFETs
- ABabcdfghiejkl Stanford University Center for Integrated Systems
- 2410 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 12, DECEMBER 2000 An Accurate and Efficient High Frequency Noise
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 10, OCTOBER 2000 1787 Challenges for Atomic Scale Modeling in Alternative
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 10, OCTOBER 2000 1843 Capacitance Reconstruction from Measured CV in
- 480 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 23, NO. 3, AUGUST 2000 A Fast 3-D Modeling Approach to Electrical
- Line Inductance Extraction and Modeling in a Real Chip With Power Grid Bendik Kleveland, Xiaoning Qi, Liam Madden1
- Issues in High Frequency Noise Simulation for Deep Submicron MOSFETs
- RF Noise Simulation for Submicron MOSFET's Based on Hydrodynamic Model Jung-Suk Goo, Chang-Hoon Choi, Eiji Morifuji
- Multi-dimensional Quantum E ect Simulation Using a Density-Gradient Model and Script-Level Programming Techniques
- 5. Conclusions This paper addresses the modeling of an LDMOS transistor and its optimization using harmonic balance
- Elimination of Non-Simultaneous Triggering E ects in Finger-type ESD Protection Transistors Using
- Introduction The rapid growth of wireless systems at radio frequencies
- Abstract --The harmonic balance method is a frequency domain analysis technique for simulating the large signal
- With the constant scaling and broad applications for IC technology, rapid and predictive prototyping of the
- A General OO-PDE Solver for TCAD Applications* D.W. Yergeau and R.W. Dutton
- Comprehensive Characterization of Electrostatically-Actuated Beams
- A PHYSICS-BASED DESIGN METHODOLOGY FOR DIGITAL SYSTEMS ROBUST TO ESD-CDM EVENTS
- MEASUREMENT, SUPPRESSION, AND PREDICTION OF DIGITAL SWITCHING NOISE COUPLING IN MIXED-SIGNAL SYSTEM-ON-
- ESD PROTECTION CIRCUITS FOR ADVANCED CMOS TECHNOLOGIES
- VIRTUAL-GROUND SENSING TECHNIQUES FOR FAST, LOW-POWER, 1.8V
- DIGITAL NOISE EMULATOR FOR CHARACTERIZATION OF PHASE-LOCKED-LOOP SYSTEMS
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- MODELING OF NANOSCALE A DISSERTATION
- A DIAL-AN-OPERATOR APPROACH TO SIMULATION OF IMPURITY DIFFUSION IN SEMICONDUCTORS
- ADVANCED MOBILITY MODELS FOR DESIGN AND SIMULATION
- A Common Mesh Implementation for Both Static and Moving Boundary Process Simulations
- Internet Based Prototyping of Micro-Electro-Mechanical Systems N. M. Wilson1
- Introduction 1.1 Background
- EXAMPLE 17: Full.Coupled Diffusion 312 SUPREMIV.GS --2D Process Simulation for Si and GaAs
- Metallic photonic crystals with strong broadband absorption at optical frequencies over wide angular range
- IEEE ELECTRON DEVICE LETTERS, VOL. 22, NO. 2, FEBRUARY 2001 101 Physical Origin of the Excess Thermal Noise in Short
- SYNTHESIZED COMPACT MODELS FOR SUBSTRATE NOISE COUPLING IN MIXED-SIGNAL ICS
- STEP DEPOSITON Fig. 12: (a) schematic showing top view. (b) before pseudo3D deposition. (c) after pseudo3D deposition.
- C--V and Gate Tunneling Current Characterization of UltraThin Gate Oxide MOS (t ox
- Table of Contents Abstract iv
- Unification of Macroscopic Impact Ionization Models for Nonhomogeneous Fields
- Page 1 of 14 Circuit Embedded Device Simulation for
- EXPERIMENTS AND SIMULATIONS OF GALLIUM ARSENIDE MESFET
- List of Figures Figure 1.1 Illustration of spatial decomposition............................................................3
- 0 10 20 30 40 50 60 Distribution of pull-in voltages
- Improved Performance and Thermal Stability of Interdigitated Power RF Bipolar Transistors with Nonlinear Base Ballasting
- 1928 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51, NO. 11, NOVEMBER 2004 Briefs___________________________________________________________________________________________
- Electro-Thermal Comparison and Performance Optimization of Thin-Body SOI and GOI MOSFETs
- CHARACTERIZATION, MODELING, AND DESIGN OF ESD PROTECTION CIRCUITS
- COUPLED ELECTROMAGNETIC AND DEVICE LEVEL INVESTIGATIONS OF METAL-INSULATOR-SEMICONDUCTOR
- With the constant scaling and broad applications for IC technology, rapid and predictive prototyping of the
- A General OOPDE Solver for TCAD Applications * D.W. Yergeau and R.W. Dutton
- Impact of Gate Tunneling Current in Scaled MOS on Circuit Performance: A Simulation Study
- Close-in phase noise in electrical oscillators Reza Navid*a
- 0 2 4 6 8 10 12 silicided_A
- Supplementary report Mark R. Pinto
- 0.5m 0.25m0.35m 0.18m CMOS Technology Generation
- 1. Introduction The various components that contribute to resistance in an LDD MOSFET include
- 1882 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 49, NO. 11, NOVEMBER 2002 Impact of Lateral Source/Drain Abruptness
- V. Conclusion Using PISCES2HB, a methodology for modeling RF MOS devices is described. The model is verified with IV and
- 292 IEEE ELECTRON DEVICE LETTERS, VOL. 20, NO. 6, JUNE 1999 MOS C--V Characterization of Ultrathin
- The rapidly growing field of MEMS has created opportunities to merge new functional
- A Heterogeneous Environment for Computational Prototyping and Simulation Based Design of
- Device/Circuit Simulation for Heterogeneous Technology Zhiping Yu, Francis Rotella, Boris Troyanovsky, and Robert W. Dutton
- case, the ``trap'' levels are actually the discrete eigenenergy levels in the quantum well and the mobile carriers over the well resemble those in the energy band. The key issues are to find the equivalent trap
- Parasitic Characterization of RadioFrequency (RF) Circuits Using MixedMode Simulation
- GEODESIC: A New and Extensible Geometry Tool and Framework with Application to MEMS
- Analysis and Optimization of Distributed ESD Protection Circuits for High-Speed Mixed-Signal and RF
- MODELING AND CHARACTERIZATION OF SUBSTRATE RESISTANCE
- GRID AND GEOMETRY SERVERS FOR SEMICONDUCTOR PROCESS SIMULATION
- Elimination of NonSimultaneous Triggering Effects in Fingertype ESD Protection Transistors Using
- 5. Conclusions This paper addresses the modeling of an LDMOS transistor and its optimization using harmonic balance
- A Fast Analytical Technique for Estimating the Bounds of On-Chip Clock Wire Yi-Chang Lu, Kaustav Banerjee, Mustafa Celik*, Robert W. Dutton
- Performance Improvement in Larger RF LDMOSFET Power Amplifiers Choshu Ito1
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 49, NO. 7, JULY 2002 1227 Dopant Profile and Gate Geometric Effects on
- 1544 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 19, NO. 12, DECEMBER 2000 Perspectives on Technology and Technology-Driven
- Characterization of Contact Electromechanics through Capacitance-Voltage Measurements and Simulations
- Amplitude and Phase Noise in Modern CMOS A DISSERTATION
- ESD DESIGN CHALLENGES AND STRATEGIES IN DEEPLY-SCALED INTEGRATED CIRCUITS
- Comprehensive study of noise processes in electrode electrolyte interfaces Arjang Hassibi,a)
- Detailed Heat Generation Simulations via the Monte Carlo Method
- 330 IEEE ELECTRON DEVICE LETTERS, VOL. 24, NO. 5, MAY 2003 Impact of Poly-Gate Depletion on MOS RF Linearity
- Technology Simulation EM Structure Simulation Circuit Simulation
- Electrostatic Micromechanical Actuator with Extended Range of Travel
- Abstract --A harmonic balance technique has been devel-oped for large-signal, steady-state analysis of semiconductor
- 14 IEEE ELECTRON DEVICE LETTERS, VOL. 22, NO. 1, JANUARY 2001 Atomic Scale Effects of Zirconium and Hafnium
- PROCEEDINGS OF SISPAD 2001 182 Impact of Substrate Resistance on
- 224 IEEE ELECTRON DEVICE LETTERS, VOL. 23, NO. 4, APRIL 2002 Gate Length Dependent Polysilicon Depletion Effects
- Internet Based Prototyping of MicroElectroMechanical Systems N. M. Wilson 1 , D. Yergeau 2 , R. W. Dutton 2
- MESHGENERATION AND INFORMATION MODEL FOR DEVICE SIMULATION
- LayoutBased 3D Solid Modeling of IC Structures and Interconnects Including Electrical Parameter
- 1ABabcdfghiejklStanford University Center for Integrated Systems
- Header for SPIE use Effects of capacitors, resistors and residual charge on the static and
- Two-Dimensional Polysilicon Quantum-Mechanical Effects in Double-Gate SOI
- Fig.11: Current during turn-on Current(mA)
- Analytic band Monte Carlo model for electron transport in Si including acoustic and optical phonon dispersion
- Thermal Analysis of Ultra-Thin Body Device Scaling Eric Pop, Robert Dutton and Kenneth Goodson
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 48, NO. 12, DECEMBER 2001 2823 Impact of Gate Direct Tunneling Current on Circuit
- Behavioral Simulation Techniques for Substrate Noise Analysis in PLL Jae Wook Kim
- THE PHYSICAL PHENOMENA RESPONSIBLE FOR EXCESS NOISE IN SHORT-CHANNEL MOS DEVICES
- Direct Tunneling Current Model for Circuit Simulation ChangHoon Choi, KwangHoon Oh, JungSuk Goo, Zhiping Yu, and Robert W. Dutton
- LEVEL SET METHODS FOR COMPUTATIONAL PROTOTYPING
- Parallel Adaptive Finite Element Software for Semiconductor Device Simulation*
- Characterization of Zener-Tunneling Drain Leakage Current in High-Dose Halo Implants
- Frequency Domain Algorithms For Simulating Large Signal Distortion in Semiconductor Devices
- Electro-thermal Simulations of Strained-Si MOSFETs under ESD conditions
- 3D Mesh Generation 4.1 Introduction
- 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 Frequency (GHz)
- avalanche using d1 and k1, we can obtain good fit with experiments. In addition, Rsub and Rds can be used to further
- 994 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 8, AUGUST 2002 A Noise Optimization Technique for Integrated
- 2288 OPTICS LETTERS / Vol. 29, No. 19 / October 1, 2004 Method for sensitivity analysis of photonic crystal devices
- Modeling of Temperature Dependent Contact Resistance for Analysis of ESD Reliability
- Investigation of Thermal Breakdown Mechanism in 0.13 m technology ggNMOS under ESD
- Modelling Calibration and Validation of Contributions to Stress in the STI Process Sequence1
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 49, NO. 12, DECEMBER 2002 2183 Impact of Gate-to-Contact Spacing on
- Abstract--This paper presents a stochastic model for the observed signal of biosensors, a model that predicts the signal
- Process and Layout Dependent Substrate Resistance Modeling for Deep Sub-Micron ESD Protection Devices
- Spatial Decomposition And Quadtree Mesh
- SemiEmpirical Local NMOS Mobility Model for 2D Device Simulation Incorporating Screened Minority Impurity Scattering
- Figure 2: Quadtree grid of mask area generated by
- Direct Tunneling Current Model for Circuit Simulation Chang-Hoon Choi, Kwang-Hoon Oh, Jung-Suk Goo, Zhiping Yu, and Robert W. Dutton
- A PMOSFET ESD Failure Caused by Localized Charge Injection Jung-Hoon Chun1
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 44, NO. 9, SEPTEMBER 1997 1375 Robust, Stable, and Accurate Boundary Movement
- FIGURE 1. The schematic of a silicided NMOS transistor indicating the gate to source/drain contact spacing (GSCS/GDCS) and the n+ overlap with
- Layout-Based 3D Solid Modeling of IC Structures and Interconnects Including Electrical Parameter
- Integration of TCAD Tools into CAD Tools for MEMS Nathan M. Wilson 1 , Robert W. Dutton 2
- Information Model, Services and 5.1 Introduction
- Conclusion and Future Research 7.1 Contributions
- ON NUMERICAL MODELING OF THERMAL OXIDATION a dissertation
- PISCES2ET and Its Application Subsystems
- Fig. 3: The fixedfixed plate test problem. The plate undergoes a maximum of 2 m of deflection, which corresponds to a pull in of a switch fabricated in the Poly1 layer in MUMPs. Geometric nonlinearity (large deflections and rotations) is accounted
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 10, OCTOBER 2000 1819 Circuit/Device Modeling at the Quantum Level
- Proceedings of IMECE'02 2002 ASME International Mechanical Engineering Congress and Exposition
- Abstract A software system for 3D solid model ing of IC structures (devices, interconnection, and
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 3, MARCH 2000 655 that of the edge coupled QWIP. Hence, Si3N4 is the suitable insulator
- Abstract A harmonic balance technique has been devel oped for largesignal, steadystate analysis of semiconductor
- Physical Modeling of Surface and Heterojunction for MesaStructured HBTs Edwin C. Kan and Robert W. Dutton
- Hot Electron Transistors on Silicon Substrate (HESS)--A Computational Prototyping
- Gridding Techniques for the Level Set Method in Semiconductor Process and Device Simulation
- Bibliography [ALUR91] N. R. Aluru, Elimination of disproportionately small finite element
- DIGITAL COMPENSATION OF DYNAMIC ACQUISITION ERRORS AT THE FRONT-END OF ADCS
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- Realization of Digital Noise Emulator for Characterization of Systems Exposed to Substrate Noise
- IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 12, DECEMBER 2003 2579 Resonant Gate Tunneling Current in Double-Gate
- 1428 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 9, SEPTEMBER 1998 Characterization of RF Power BJT and Improvement
- Multidimensional Quantum Effect Simulation Using a DensityGradient Model and ScriptLevel Programming Techniques
- A Heterogeneous Environment for Computational Prototyping and Simulation Based Design of
- PROCEEDINGS OF SISPAD 2000 269 Guidelines for the Power Constrained Design of a CMOS Tuned LNA
- Coupled optical and electronic simulations of electrically pumped photonic-crystal-based light-emitting diodes
- Non-uniform Conduction Induced Reverse Channel Length Dependence of ESD Reliability for Silicided NMOS Transistors
- EXTENSION LATERAL DOPING ABRUPTNESS ON DEEP SUBMICRON DEVICE PERFORMANCE
- ATOMIC SCALE MODELING OF SILICATE INTERFACE PROPERTIES FOR
- V. Conclusion Using PISCES2H-B, a methodology for modeling RF MOS devices is described. The model is verified with IV and
- Effects of Surface Properties on the Effective Electrical Gap of Microelectromechanical Devices Operating in Contact
- STATISTICAL MODELING OF BIOCHEMICAL DETECTION SYSTEMS Sina Zahedi, Reza Navid, Arjang Hassibi
- avalanche using d1 and k1, we can obtain good fit with experiments. In addition, Rsub and Rds can be used to further
- Harmonic and intermodulation distortion effects play an important role in numerous analog applications, partic
- Complete Characterization of Electrostatically-Actuated Beams including Effects of Multiple Discontinuities and Buckling
- Harmonic and intermodulation distortion effects play an important role in numerous analog applications, partic-
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