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Research Accelerator for Multiple Processors
 

Summary: 1
1
Research Accelerator for
Multiple Processors
David Patterson (Berkeley, CO-PI), Arvind (MIT),
Krste Asanovíc (MIT), Derek Chiou (Texas), James
Hoe(CMU), Christos Kozyrakis(Stanford), Shih-Lien Lu
(Intel), Mark Oskin (Washington), Jan Rabaey
(Berkeley), and John Wawrzynek (Berkeley-PI)
2
Old Conventional Wisdom:
Demonstrate new ideas by building chips
New Conventional Wisdom:
Mask costs, ECAD costs, GHz clock rates
mean
researchers cannot build believable
prototypes
simulation only practical outlet
Conventional Wisdom (CW)
in Computer Architecture

  

Source: Asanovic, Krste - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)

 

Collections: Computer Technologies and Information Sciences