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1340 IEEE ELECTRON DEVICE LETTERS, VOL. 32, NO. 10, OCTOBER 2011 Scaling Analysis of Nanowire
 

Summary: 1340 IEEE ELECTRON DEVICE LETTERS, VOL. 32, NO. 10, OCTOBER 2011
Scaling Analysis of Nanowire
Phase-Change Memory
Jie Liu, Bin Yu, Fellow, IEEE, and M. P. Anantram
Abstract--This letter analyzes the scaling property of nanowire
(NW) phase-change memory (PCM) using analytic and numerical
methods. The scaling scenarios of the three widely used NW PCM
operation schemes (i.e., constant electric field, voltage, and cur-
rent) are studied and compared. It is shown that if the device size
is downscaled by a factor of 1/k (k > 1), the operation energy
(current) will be reduced by more than k3
(k) times, and the
operation speed will be increased by k2
times. It is also shown that
more than 90% of operation energy is wasted as thermal flux into
substrate and electrodes. We predict that, if the wasted thermal
flux is effectively reduced by heat confinement technologies, the
energy consumed per RESET operation can be decreased from
about 1 pJ to less than 100 fJ. It is shown that reducing NW aspect
ratio helps decreasing PCM energy consumption. It is revealed

  

Source: Anantram, M. P. - Department of Electrical Engineering, University of Washington at Seattle

 

Collections: Materials Science; Computer Technologies and Information Sciences