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1520 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 12, DECEMBER 2000 Transactions Briefs__________________________________________________________________
 

Summary: 1520 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 12, DECEMBER 2000
Transactions Briefs__________________________________________________________________
An Efficient Architecture for Multi-Dimensional
Convolution
A. Elnaggar and M. Aboelaze
Abstract--This paper presents modified parallel architectures for multi-
dimensional ( -d) convolution. We show that for two-dimensional (2-d)
convolutions, with careful design, the number of lower-order 2-d convolu-
tions can be reduced from nine to six with a computation saving of 33%.
Moreover, the original speed of the computations is not affected. The pro-
posed partitioning strategy results in a core of data-independent convolu-
tion computations, and can be generalized to the -d convolution. The
resulting very large scale integration networks have very simple modular
structure, highly regular topology, and use simple arithmetic devices.
I. INTRODUCTION
Multi-dimensional (m-d) convolution is a very important operation
in signal and image processing with applications to digital filtering and
video processing. Thus, abundant approaches have been suggested to
achieve high-speed processing for linear convolution, and to design ef-
ficient convolution architectures [3][6]. However, the majority of the

  

Source: Aboelaze, Mokhtar - Department of Computer Science, York University (Toronto)

 

Collections: Computer Technologies and Information Sciences