Summary: Discriminatory processor
sharing revisited
Konstantin Avrachenkov (INRIA)
Urtzi Ayesta (CWI)
Patrick Brown (France Telecom R&D)
R. Núñez Queija (CWI and TU/e)
The DPS model
Class k{1,2,...,M}
Poisson arrival, k
Service time requirements, Fk(x)= Pk(Xkx)
Load k= k[Xk]
stability,
vector of weights {gj >0;j=1,...,M}
service rate,
arrivals queues server
1
2
N1 (t)
Class 1
1

Source: Ayesta, Urtzi - Laboratoire d'Analyse et d'Architecture des Systèmes du CNRS

Collections: Engineering