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Characterizing Energy Consumption in Hardware Transactional Memory Systems Epifanio Gaona-Ramirez, Ruben Titos-Gil, Juan Fernandez, Manuel E. Acacio

Summary: Characterizing Energy Consumption in Hardware Transactional Memory Systems
Epifanio Gaona-Ram´irez, Rub´en Titos-Gil, Juan Fern´andez, Manuel E. Acacio
Computer Engineering Department
University of Murcia
Murcia, Spain
{fanios.gr, rtitos, juanf, meacacio}@ditec.um.es
Abstract--Transactional Memory is currently being advo-
cated as a promising alternative to lock-based synchronization
because it simplifies multithreaded programming. In this way,
future many-core CMP architectures may need to provide
hardware support for transactional memory. On the other
hand, power dissipation constitutes a first class consideration
in multicore processor design. In this work, we characterize
the performance and energy consumption of two well-known
Hardware Transactional Memory systems that employ opposite
policies for data versioning and conflict management. More
specifically, we compare the LogTM-SE Eager-Eager system
and a version of the Scalable TCC Lazy-Lazy system that
enables parallel commits. To the best of our knowledge, this
is the first characterization in terms of energy consumption


Source: Acacio, Manuel - Departamento de Ingenieria y Tecnologia de Computadores, Universidad de Murcia


Collections: Computer Technologies and Information Sciences