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A Low Power CMOS CORDIC Processor Design for Wireless Telecommunication
 

Summary: A Low Power CMOS CORDIC Processor Design
for Wireless Telecommunication
Young Bok Kim,Yong-Bin Kim
Dept. of Electrical and Computer Engineering
Northeastern University
Boston, MA, USA
{youngbok, ybk}@ece.neu.edu
James T. Doyle
Principal Design Engineer
National Semiconductor .Coporation
Longmont, CO, USA
Jim.doyle@nsc.com
Abstract--A CORDIC processor for wire telecommunication is
integrated in a 0.5Ám CMOS technology. The CORDIC
(coordinate rotation digital computer) processor reduces the
circuit complexity by performing a sequence of elementary
rotations using shift and add operations without
multiplications. Hard wired-logic eliminates the shifter and
includes pre-calculated arctan angle values. The average power
consumption is 76mW with 50MHz clock and 5V power

  

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

 

Collections: Engineering