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Salicidation process using NiSi and its device application R. A. Johnson, P. M. Asbeck, and S. S. Lau
 

Summary: Salicidation process using NiSi and its device application
F. Deng,a)
R. A. Johnson, P. M. Asbeck, and S. S. Lau
Department of Electrical and Computer Engineering, University of California, San Diego, La Jolla,
California 92093-0407
W. B. Dubbelday
Naval, Command, Control and Ocean Surveillance Center, RDT&E Division (NRaD), San Diego,
California 92152-7633
T. Hsiao and J. Woo
Department of Electrical Engineering, University of California, Los Angeles, Los Angeles, California 90024
Received 27 December 1996; accepted for publication 25 February 1997
Self-aligned silicidation is a well-known process to reduce source, drain, and gate resistances of
submicron metal-oxide-semiconductor devices. This process is particularly useful for devices built
on very thin Si layers 1000 or less on insulators because of the large source and drain
resistances associated with the thin Si layer. NiSi is a good candidate for salicidation process due to
its low resistivity, low formation temperature, little silicon consumption, and large stable processing
temperature window. In this article, the formation of nickel mono-silicide NiSi using rapid thermal
annealing, the thermal stability of NiSi on n poly-Si and the contact resistance of NiSi on n Si
layers in a SIMOX structure were investigated. NiSi salicidation process was, then, incorporated
into a NMOS/SIMOX device fabrication for partial and full consumption of the Si in the source and

  

Source: Asbeck, Peter M. - Department of Electrical and Computer Engineering, University of California at San Diego

 

Collections: Engineering