Summary: To appear in the proceedings of The International Conference on Dependable Systems and Networks (DSN-04), June 2004.
The Impact of Technology Scaling on Lifetime Reliability
” , Sarita V. Adve
” , Pradip Bose
¢ , Jude A. Rivers
” Department of Computer Science, University of Illinois, Urbana-Champaign¢ IBM T.J. Watson Research Center, Yorktown Heights, NY£ srinivsn,firstname.lastname@example.org¤ ,
The relentless scaling of CMOS technology has provided
a steady increase in processor performance for the past
three decades. However, increased power densities (hence
temperatures) and other scaling effects have an adverse im-
pact on long-term processor lifetime reliability. This paper
represents a first attempt at quantifying the impact of scal-
ing on lifetime reliability due to intrinsic hard errors, taking
workload characteristics into consideration.
For our quantitative evaluation, we use RAMP , a