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Hindawi Publishing Corporation VLSI Design

Summary: Hindawi Publishing Corporation
VLSI Design
Volume 2010, Article ID 946710, 11 pages
Research Article
A Low-Power Digitally Controlled Oscillator for
All Digital Phase-Locked Loops
Jun Zhao and Yong-Bin Kim
Department of Electrical and Computer Engineering, Northeastern University, Boston, MA 02115, USA
Correspondence should be addressed to Yong-Bin Kim, ybk@ece.neu.edu
Received 31 May 2009; Accepted 20 October 2009
Academic Editor: Gregory D. Peterson
Copyright 2010 J. Zhao and Y.-B. Kim. This is an open access article distributed under the Creative Commons Attribution
License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly
A low-power and low-jitter 12-bit CMOS digitally controlled oscillator (DCO) design is presented. The Low-Power CMOS DCO is
designed based on the ring oscillator implemented with Schmitt trigger inverters. The proposed DCO circuit uses control codes of
thermometer type to reduce jitters. Performance of the DCO is verified through a novel All Digital Phase-Locked Loop (ADPLL)
designed with a unique lock-in process by employing a time-to-digital converter, where both the frequency of the reference clock
and the delay between DCO output and DCO clock is measured. A carefully designed reset process reduces the phase acquisition


Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University


Collections: Engineering