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Summary: Object-Oriented Reconfigurable Processing for Wireless Networks
Andrew A. Gray, Clement Lee, Payman Arabshahi, Jeffrey Srinivasan
Jet Propulsion Laboratory, California Institute of Technology
4800 Oak Grove Drive, MS 238-343, Pasadena, CA 91101 USA
Abstract We present an outline of reconfigurable processor
technologies and design methods with emphasis on an object-
oriented approach, and both full and partial dynamic
reconfiguration. A specific broadly applicable architecture for
implementing a software reconfigurable network processor for
wireless communication applications is presented; a prototype
of which is currently operating in the laboratory. This
architecture, its associated object oriented design methods, and
partial reconfiguration techniques enable rapid-prototyping
and rapid implementations of communications and navigation
signal processing functions; provide long-life communications
infrastructure; and result in dynamic operation within
networks with heterogeneous nodes, as well as compatibility
with other networks. This work builds upon numerous
advances in commercial industry as well as military software
radio developments to space-based radios and network
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