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Summary: Towards a Software-Hardware Co-Designed
Resilient System
Man-Lap Li, Pradeep Ramachandran, Sarita V. Adve, Vikram S. Adve, Yuanyuan Zhou
Department of Computer Science
University of Illinois at Urbana-Champaign
{manlapli,pramach2,sadve,vadve,yyzhou}@uiuc.edu
Abstract-- With continued CMOS scaling, future shipped
hardware will be increasingly vulnerable to in-the-field
faults. To be broadly deployable, the hardware reliability
solution must incur low overheads, precluding use of
excessive redundancy. We explore a co-designed hardware-
software solution that treats most hardware faults as soft-
ware bugs and leverages common mechanisms for hardware
and software reliability, thereby amortizing some of the
overhead. Fundamental to such a solution is a characteriza-
tion of how hardware faults in different microarchitectural
structures of a modern processor propagate through the
application and OS. In this paper, we first summarize
such a characterization for permanent faults. Motivated
by this characterization, we discuss our software-hardware
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