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Summary: In the IEEE TCCA Newsletter (October 1997). (An earlier version appeared in WCAE3, February 1997.)
RSIM: An ExecutionDriven Simulator for ILPBased
SharedMemory Multiprocessors and Uniprocessors
Vijay S. Pai, Parthasarathy Ranganathan, and Sarita V. Adve
Department of Electrical and Computer Engineering
Rice University
Houston, Texas
http://wwwece.rice.edu/¸rsim
Abstract
This paper describes RSIM -- the Rice Simulator
for ILP Multiprocessors -- Version 1.0. RSIM sim
ulates sharedmemory multiprocessors (and unipro
cessors) built from processors that aggressively ex
ploit instructionlevel parallelism (ILP). RSIM is
executiondriven and models stateoftheart ILP pro
cessors, an aggressive memory system, and a multi
processor coherence protocol and interconnect, includ
ing contention at all resources. Although originally
designed as a research tool, RSIM is also being used
successfully in both undergraduate and graduate com
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