Summary: To appear in 25th Annual International Symposium on Computer Architecture
Analytic Evaluation of Shared­Memory Systems with ILP Processors \Lambda
Daniel J. Sorin y , Vijay S. Pai z , Sarita V. Adve z , Mary K. Vernon y , and David A. Wood y
y Computer Sciences Dept z Dept of Electrical & Computer Engineering
University of Wisconsin ­ Madison Rice University
fsorin, vernon, davidg@cs.wisc.edu fvijaypai, saritag@rice.edu
Abstract
This paper develops and validates an analytical model
for evaluating various types of architectural alternatives for
shared­memory systems with processors that aggressively
exploit instruction­level parallelism. Compared to simu­
lation, the analytical model is many orders of magnitude
faster to solve, yielding highly accurate system performance
estimates in seconds.
The model input parameters characterize the ability of
an application to exploit instruction­level parallelism as
well as the interaction between the application and the
memory system architecture. A trace­driven simulation
methodology is developed that allows these parameters to
be generated over 100 times faster than with a detailed

Source: Adve, Sarita - Department of Computer Science, University of Illinois at Urbana-Champaign

Collections: Computer Technologies and Information Sciences