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Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable
 

Summary: Integrated Heterogenous Modelling for Power
Estimation of Single Processor based Reconfigurable
SoC Platform
Prakash Srinivasan1
Ali Ahmadinia 1
Ahmet T Erdogan1,2
Tughrul Arslan1,2
Email: {P.Srinivasan, A.Ahmadinia, T.Arslan} @ ed.ac.uk, Ahmet.Erdogan@ee.ed.ac.uk
1
School of Engineering and Electronics 2
Institute of System Level Integration
The University of Edinburgh, Edinburgh, UK Livingston, UK
Abstract--Various instruction and transaction based power
estimation techniques for processor and on-chip buses have been
proposed in the past. In this paper, we propose a heterogeneous
power model to estimate the power utilized by complete
processor based reconfigurable System-on-Chip (SoC) platform.
The proposed model estimates the power consumed by the SoC
platform using instruction-based model as well as transaction-
based model. In addition we estimate the power consumed by

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering