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Efficient Microarchitecture Policies for Accurately Adapting to Power Constraints
 

Summary: Efficient Microarchitecture Policies for Accurately
Adapting to Power Constraints
Juan M. Cebrián1
, Juan L. Aragón1
, José M. García1
, Pavlos Petoumenos2
and Stefanos Kaxiras2
1 Dept. of Computer Engineering, University of Murcia, Murcia, 30100, Spain
{jcebrian,jlaragon,jmgarcia}@ditec.um.es
2 Dept. of Electrical and Computer Engineering, University of Patras, 26500, Greece
{kaxiras,ppetoumenos}@ee.upatras.gr
Abstract
In the past years Dynamic Voltage and Frequency
Scaling (DVFS) has been an effective technique that
allowed microprocessors to match a predefined power
budget. However, as process technology shrinks,
DVFS becomes less effective (because of the
increasing leakage power) and it is getting closer to a
point where DVFS won't be useful at all (when static
power exceeds dynamic power). In this paper we

  

Source: Aragón Alcaraz, Juan Luis - Departamento de Ingenieria y Tecnologia de Computadores, Universidad de Murcia

 

Collections: Computer Technologies and Information Sciences