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Memory System Design Space Exploration for Low-Power, Real-Time Speech Recognition
 

Summary: Memory System Design Space Exploration for Low-Power,
Real-Time Speech Recognition
Rajeev Krishna, Scott Mahlke, and Todd Austin
Advanced Computer Architecture Lab
University of Michigan (Ann Arbor)
{rkrishna, mahlke, austin}@eecs.umich.edu
ABSTRACT
The recent proliferation of computing technology has brought
added interest to natural I/O interface technologies such
as speech recognition. Unfortunately, the computational
and memory demands of such applications currently pro-
hibit their use on low­power portable devices in anything
more than their simplest forms. Previous work has demon-
strated that the thread level concurrency inherent in this
application domain can be used to dramatically improve
performance with minimal impact on overall system energy
consumption, but that such benefits are severely constrained
by memory system bandwidth. This work presents a design
space exploration of potential memory system architectures.
A range of low­power memory organizations are considered,

  

Source: Austin, Todd M. - Department of Electrical Engineering and Computer Science, University of Michigan

 

Collections: Engineering; Computer Technologies and Information Sciences