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Lecture 3.1 INTERNATIONAL TEST CONFERENCE 1 978-1-4244-4867-8/09/$25.00 2009 IEEE
 

Summary: Lecture 3.1 INTERNATIONAL TEST CONFERENCE 1
978-1-4244-4867-8/09/$25.00 2009 IEEE
Tolerance of Performance Degrading Faults for Effective Yield Improvement
Tong-Yu Hsieh1
, Melvin A. Breuer2
, Murali Annavaram2
, Sandeep K. Gupta2
and Kuen-Jong Lee1
1
Dept. of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan
2
Dept. of Electrical Engineering, University of Southern California, Los Angeles, USA
Abstract
To provide a new avenue for improving yield for nano-
scale fabrication processes, we introduce a new notion:
performance degrading faults (pdef). A fault is said to be
a pdef if it cannot cause a functional error at system
outputs but may result in system performance degradation.
In a processor, a fault is a pdef if it causes no error in the
execution of user programs but may reduce performance,

  

Source: Annavaram, Murali - Department of Electrical Engineering, University of Southern California

 

Collections: Engineering; Computer Technologies and Information Sciences