Summary: EE 360R -- Computer-aided IC Design Fall 2007
Adnan Aziz firstname.lastname@example.org
ACE 6.120 (512) 475-9774
Office Hours: TuTh 11:00-12:00 Lecture: TuTh 9:30-11:00, ENS 302
We aim to study the process of implementing a digital system as a CMOS integrated circuit.
The course will begin with a review of the basics of CMOS transistor operation and the manufacturing
process for CMOS VLSI chips.
We will then study in detail the problem of implementing logic gates in CMOS. Specifically, we will
cover layout, design rules, and circuit families.
Afterwards, we will examine techniques for analysing and optimizing timing and power at the circuit
level. We will study sequential elements--latches and flops--and clocking. This will be followed by an
overview of datapath design: detection logic, shifters, comparators, adders, and multipliers. We will
also study memories, specifically the workhorse 6-T SRAM cell as well as peripheral decode logic.
The course will conclude with a survey level treatment of various topics, including advanced circuit
design techniques, clock tree design, functional verification, test, design-for-test, electrical effects, pack-
aging, and future trends.
This course is intended for ECE undergraduate students. A knowledge of digital logic design (EE316
or its equivalent), and Computer Architecture (EE360N, or its equivalent) is required.