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Summary: 1
MODELING AND DETECTING CONTROL ERRORS IN
MICROPROCESSORS
HUSSAIN AL-ASAAD
Computer Engineering Research Laboratory
Department of Electrical and Computer Engineering
University of California, One Shields Avenue, Davis, CA 95616-5294
E-mail: halasaad@ece.ucdavis.edu
JOHN P. HAYES and TREVOR MUDGE
Advanced Computer Architecture Laboratory
Department of Electrical Engineering and Computer Science
University of Michigan, 1301 Beal Avenue, Ann Arbor, MI 48109-2122
E-mail: {jhayes,tnm}@eecs.umich.edu
Design validation for microprocessors based on modeling design errors and generating tests for
them is discussed. An error model for control errors is introduced and validated experimentally
for a small microprocessor. A general validation approach using this model is outlined. Prelim-
inary experimental results suggest that high coverage of control as well as data errors can be
achieved using our approach.
1 Introduction
Hardware verification has long been handicapped by the absence of good high-level
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