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Summary: Dynamic Power Redistribution in Failure Prone CMPs
Paula Petrica
Computer Systems Laboratory
Cornell University
Jonathan A. Winter
Google, Inc.
David H. Albonesi
Computer Systems Laboratory
Cornell University
Abstract
Future chip multiprocessors (CMPs) will be capable of de-
configuring faulty units in order to permit continued opera-
tion in the presence of wear-out failures. However, the un-
foreseen downside is pipeline imbalance due to other por-
tions of the pipeline now being overprovisioned with respect to
the deconfigured functionality. We propose PowerTransfer, a
novel CMP architecture that dynamically redistributes the chip
power under pipeline imbalances that arise from deconfiguring
faulty units. Through rebalancing achieved by temporary,
symbiotic deconfiguration of additional functionality within
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