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Hybrid Analytical Modeling of Pending Cache Hits, Data Prefetching, and MSHRs Xi E. Chen Tor M. Aamodt
 

Summary: Hybrid Analytical Modeling of Pending Cache Hits, Data Prefetching, and MSHRs
Xi E. Chen Tor M. Aamodt
Department of Electrical and Computer Engineering
University of British Columbia, Vancouver, BC, CANADA
Email: {xichen, aamodt}@ece.ubc.ca
Abstract
As the number of transistors integrated on a chip continues
to increase, a growing challenge is accurately modeling per-
formance in the early stages of processor design. Analytical
models have been employed to rapidly search for higher
performance designs, and can provide insights that detailed
simulators may not. This paper proposes techniques to predict
the impact of pending cache hits, hardware prefetching, and
realistic miss status holding register (MSHR) resources on
superscalar performance in the presence of long latency
memory systems when employing hybrid analytical models
that apply instruction trace analysis. Pending cache hits are
secondary references to a cache block for which a request
has already been initiated but has not yet completed. We
find pending hits resulting from spatial locality and the

  

Source: Aamodt, Tor - Department of Electrical and Computer Engineering, University of British Columbia

 

Collections: Engineering; Computer Technologies and Information Sciences