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BUILDING MANY-CORE PROCESSOR-TO-DRAM NETWORKS
 

Summary: .........................................................................................................................................................................................................................
BUILDING MANY-CORE
PROCESSOR-TO-DRAM NETWORKS
WITH MONOLITHIC CMOS
SILICON PHOTONICS
.........................................................................................................................................................................................................................
SILICON PHOTONICS IS A PROMISING TECHNOLOGY FOR ADDRESSING MEMORY
BANDWIDTH LIMITATIONS IN FUTURE MANY-CORE PROCESSORS. THIS ARTICLE FIRST
INTRODUCES A NEW MONOLITHIC SILICON-PHOTONIC TECHNOLOGY, WHICH USES A
STANDARD BULK CMOS PROCESS TO REDUCE COSTS AND IMPROVE ENERGY EFFICIENCY,
AND THEN EXPLORES THE LOGICAL AND PHYSICAL IMPLICATIONS OF LEVERAGING THIS
TECHNOLOGY IN PROCESSOR-TO-MEMORY NETWORKS.
......Modern embedded, server, graph-
ics, and network processors already include
tens to hundreds of cores on a single die,
and this number will continue to increase
over the next decade. Corresponding
increases in main memory bandwidth are
also required, however, if the greater core
count is to result in improved application

  

Source: Asanovic, Krste - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)

 

Collections: Computer Technologies and Information Sciences