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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 19, NO. 10, OCTOBER 2000 1149 Sequential Synthesis Using S1S
 

Summary: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 19, NO. 10, OCTOBER 2000 1149
Sequential Synthesis Using S1S
Adnan Aziz, Felice Balarin, Member, IEEE, Robert K. Brayton, Fellow, IEEE, and
Alberto Sangiovanni-Vincentelli, Fellow, IEEE
Abstract--We propose the use of the logic S1S as a mathemat-
ical framework for studying the synthesis of sequential designs. We
will show that this leads to simple and mathematically elegant solu-
tions to problems arising in the synthesis and optimization of syn-
chronous digital hardware. Specifically, we derive a logical expres-
sion which yields a single finite state automaton characterizing the
set of implementations that can replace a component of a larger
design. The power of our approach is demonstrated by the fact
that it generalizes immediately to arbitrary interconnection topolo-
gies, and to designs containing nondeterminism and fairness. We
also describe control aspects of sequential synthesis and relate con-
troller realizability to classical work on program synthesis and tree
automata.
Index Terms--Automata theory, discrete control, mathematical
logic, sequential logic synthesis.
I. INTRODUCTION

  

Source: Aziz, Adnan - Department of Electrical and Computer Engineering, University of Texas at Austin

 

Collections: Computer Technologies and Information Sciences