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SHIFT-ACCUMULATORALU CENTRICJPEG2000 513 LIFTING BASED DISCRETEWAVELET TRANSFORM
 

Summary: SHIFT-ACCUMULATORALU CENTRICJPEG2000 513
LIFTING BASED DISCRETEWAVELET TRANSFORM
ARCHITECTURE
K-C. B. Tanand T. Arslan
Institute of Micro and Nano System,
School of Engineering and Electronics, The University of Edinburgh,
The King's Buildings, Mayfield Road, Edinburgh EH9 3JL, Scotland, U.K.
Phone: +44 131 6505619 Fax:+44 131 6506554
Email: Benny.Tan@ee.ed.ac.uk
ABSTRACT
This paper presents a novel (low arithmetic unit count) hardware
architecture for performing lifting-based JPEG2000's 513
Discrete Wavelet Transform (DWT). The architecture is built
around parallel Shift-Accumulator Arithmetic Logic Units
(ALUs) which can encode (with implicit embedded
extension[S]) up to five levels of transformation. The proposed
architecture, which consists of three adders, two subtractor-
adders and five shifters,has a significantly lower hardware count
compared to the architectures proposed by K. Andra et. al. [5]
and G I . Lian et. al. [6]. In addition, the architecture has an

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering