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Low-Power Circuits for Brain-Machine Interfaces Rahul Sarpeshkar, Woradorn Wattanapanitch,
 

Summary: Low-Power Circuits for Brain-Machine Interfaces
Rahul Sarpeshkar, Woradorn Wattanapanitch,
Benjamin I. Rapoport, Scott K. Arfin, Michael W.
Baker, Soumyajit Mandal, and Michale S. Fee
Massachusetts Institute of Technology
Cambridge, Massachusetts, United States of America
rahuls@mit.edu
Sam Musallam and Richard A. Andersen
Division of Biology
California Institute of Technology
Pasadena, California, United States of America
Abstract--This paper presents work on ultra-low-power circuits
for brain-machine interfaces with applications for paralysis
prosthetics, prosthetics for the blind, and experimental
neuroscience systems. The circuits include a micropower neural
amplifier with adaptive power biasing for use in multi-electrode
arrays; an analog linear decoding and learning architecture for
data compression; radio-frequency (RF) impedance modulation
for low-power data telemetry; a wireless link for efficient power
transfer; mixed-signal system integration for efficiency,

  

Source: Andersen, Richard - Division of Biology, California Institute of Technology

 

Collections: Biology and Medicine