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Cache accesses consume a significant portion of total energy dissipation in modern microprocessors. In this paper, we introduce
 

Summary: Abstract
Cache accesses consume a significant portion of total energy
dissipation in modern microprocessors. In this paper, we introduce
a new technique for data cache energy reduction, which exploits
the prevalence of small values and the inefficiency of using a full
word for their storage. Simulation results show that we can reduce
total data cache energy by around 23% for the SPEC benchmarks
without significant performance degradation. We also propose a
modified data compression cache architecture utilizing empty
cache space that is not used after data compression. This proposed
architecture improves the cache miss rate, which results in
improved performance and reduced energy dissipation when
accessing the next level of the memory hierarchy. We show that
this scheme has an energy saving of about 19%.
1. Introduction
Energy dissipation is an increasingly important design con-
straint in a wide range of processors, from those intended for
mobile use, all the way up to high-performance processors for
high-end servers [1]. Within a typical processor, cache accesses
consume a significant fraction (30%-60% [2, 3]) of the total energy

  

Source: Austin, Todd M. - Department of Electrical Engineering and Computer Science, University of Michigan
Mudge, Trevor - Department of Electrical Engineering and Computer Science, University of Michigan

 

Collections: Computer Technologies and Information Sciences; Engineering