Summary: Rapid Development of a Flexible Validated Processor Model
David A. Penry and David I. August
Department of Computer Science
Princeton, NJ 08544
Department of Electrical Engineering
University of Colorado
Boulder, CO 80309
Liberty Research Group Technical Report 04-03, November 2004
For a variety of reasons, most architectural evaluations use simulation models. An accurate baseline model validated
against existing hardware provides confidence in the results of these evaluations. Meanwhile, a meaningful exploration of
the design space requires a wide range of quickly-obtainable variations of the baseline. Unfortunately, these two goals are
generally considered to be at odds; the set of validated models is considered exclusive of the set of easily malleable models.
Vachharajani et al. challenge this belief and propose a modeling methodology they claim allows rapid construction of flexible
validated models. Unfortunately, they only present anecdotal and secondary evidence to support their claims.
In this paper, we present our experience using this methodology to construct a validated flexible model of Intel's Itanium
2 processor. Our practical experience lends support to the above claims. Our initial model was constructed by a single