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Use of Fault Dropping for Multiple Fault Analysis Youns KARKOURI, El Mostapha ABOULHAMID, Eduard CERNY and Alain VERREAULT
 

Summary: - 1 -
Use of Fault Dropping for Multiple Fault Analysis
Younès KARKOURI, El Mostapha ABOULHAMID, Eduard CERNY and Alain VERREAULT
Dép. d'informatique et de recherche opérationnelle
Université de Montréal, C.P. 6128, Succ. "A"
Montréal, (Québec), H3C-3J7, Canada.
ABSTRACT
A new approach to fault analysis is presented. We consider multiple stuck-at-0/1 faults at the gate
level. First, a fault collapsing phase is applied to the network, so that equivalent faults are eliminated.
During the analysis we consider frontier faults where there is at least a normal path from each faulty line to
a primary output. It is shown that the set of frontier faults is equivalent to the set of multiple faults. Given
an input vector, we evaluate the fault free circuit and then propagate fault effects. Assuming that fault free
response is observed, a fault dropping procedure is then applied to eliminate faulty conditions on lines, that
are either absent or may be hidden by other faulty conditions. This method is applied to some benchmark
circuits and achieves high degree of efficiency.
Keywords: logic circuits, stuck-at faults, fault collapsing, fault dropping, multiple fault analysis.
- 2 -
I. INTRODUCTION
This paper presents a new approach to multiple fault analysis. Given a set of input vectors, our
objective is to determine the set of multiple stuck-at-0/1 (s-a-0/1) faults that are not present in the

  

Source: Aboulhamid, El Mostapha - Département d'Informatique et recherche opérationnelle, Université de Montréal

 

Collections: Engineering